Issued Patents 2018
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10157922 | Interconnect metal layout for integrated circuit | Wei-Cheng Lin, Kam-Tou Sio, Jiann-Tyng Tzeng | 2018-12-18 |
| 10109582 | Advanced metal connection with metal cut | Chih-Liang Chen, Cheng-Chi Chuang, Chih-Ming Lai, Chia-Tien Wu, Hui-Ting Yang +6 more | 2018-10-23 |
| 10096522 | Dummy MOL removal for performance enhancement | Hui-Ting Yang, Chih-Ming Lai, Chun-Kuang Chen, Chih-Liang Chen, Jiann-Tyng Tzeng +4 more | 2018-10-09 |
| 10074657 | Method of manufacturing fins and semiconductor device which includes fins | Chih-Liang Chen, Chih-Ming Lai, Chin-Yuan Tseng, Jiann-Tyng Tzeng, Kam-Tou Sio +3 more | 2018-09-11 |
| 10050028 | Semiconductor device with reduced leakage current | Shih-Wei Peng, Chung-Hsing Wang, Chih-Liang Chen, Jiann-Tyng Tzeng, Yi-Hsun Chiu +1 more | 2018-08-14 |
| 10032759 | High-density semiconductor device | Chih-Liang Chen, Chih-Ming Lai, Jiann-Tyng Tzeng, Kam-Tou Sio, Ru-Gun Liu +2 more | 2018-07-24 |
| 9984964 | Integrated circuit having slot via and method of forming the same | Wei-Cheng Lin, Jiann-Tyng Tzeng, Praneeth Narayanasetti | 2018-05-29 |
| 9917050 | Semiconductor device including source/drain contact having height below gate stack | Chih-Liang Chen, Chih-Ming Lai, Kam-Tou Sio, Ru-Gun Liu, Meng-Hung Shen +2 more | 2018-03-13 |
| 9911697 | Power strap structure for high performance and low current density | Chih-Liang Chen, Chih-Ming Lai, Chi-Yeh Yu, Jiann-Tyng Tzeng, Kam-Tou Sio +6 more | 2018-03-06 |