Issued Patents 2018
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10157869 | Integrated circuit package | Gerald Ofner, Teodora Ossiander, Frank Zudock, Christian Geissler | 2018-12-18 |
| 10150668 | Microelectromechanical system (MEMS) on application specific integrated circuit (ASIC) | Gerald Ofner, Reinhard Mahnkopf, Christian Geissler, Andreas Augustin | 2018-12-11 |
| 10147710 | Method of embedding WLCSP components in E-WLB and E-PLB | Vijay K. Nair | 2018-12-04 |
| 10128205 | Embedded die flip-chip package assembly | Sven Albers | 2018-11-13 |
| 10122420 | Wireless in-chip and chip to chip communication | Andreas Augustin, Reinhard Golly, Peter Baumgartner | 2018-11-06 |
| 10096584 | Method for producing a power semiconductor module | Olaf Hohlfeld, Guido Boenig, Irmgard Escher-Poeppel, Edward Fuergut, Martin Gruber | 2018-10-09 |
| 10056352 | High density chip-to-chip connection | — | 2018-08-21 |
| 10043768 | Semiconductor device and method of manufacture thereof | Ludwig Heitzer | 2018-08-07 |
| 9997444 | Microelectronic package having a passive microelectronic device disposed within a package body | Gerald Ofner, Andreas Wolter, Georg Seidemann, Sven Albers, Christian Geissler | 2018-06-12 |
| 9991239 | Method of embedding WLCSP components in e-WLB and e-PLB | Vijay K. Nair | 2018-06-05 |
| 9985005 | Chip package-in-package | Sven Albers, Andreas Wolter | 2018-05-29 |
| 9984900 | Semiconductor device including at least one element | Jens Pohl | 2018-05-29 |
| 9972601 | Integrated circuit package having wirebonded multi-die stack | Pauli Jaervinen, Richard Patten | 2018-05-15 |
| 9904321 | Wearable electronic devices and components thereof | Dirk Plenkers, Hans-Joachim Barth, Bernd Waidhas, Yen Hsiang Chew, Kooi Chi Ooi +1 more | 2018-02-27 |
| 9888577 | Passive electrical devices with a polymer carrier | Gerald Ofner, Sven Albers, Reinhard Mahnkopf | 2018-02-06 |
| 9874820 | System and process for fabricating semiconductor packages | — | 2018-01-23 |
| 9856136 | Chip arrangement and method for manufacturing a chip arrangement | Gerald Ofner, Christian Mueller, Reinhard Mahnkopf, Christian Geissler, Andreas Augustin | 2018-01-02 |