Issued Patents 2017
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9799602 | Integrated circuit having a staggered fishbone power network | Kuang-Hung Chang, Wen-Hao Chen, Kumar Lalgudi | 2017-10-24 |
| 9768119 | Apparatus and method for mitigating dynamic IR voltage drop and electromigration affects | Chih-Yeh Yu, Chung-Min Fu, Wen-Hao Chen, Wan-Yu Lo | 2017-09-19 |
| 9754073 | Layout optimization for integrated circuit design | Huang-Yu Chen, Yu-Hsiang Kao, Ken-Hsien Hsieh, Ru-Gun Liu, Lee-Chung Lu | 2017-09-05 |
| 9747402 | Methods for double-patterning-compliant standard cell design | Huang-Yu Chen, Fung Song Lee, Wen-Ju Yang, Gwan Sin Chang, Yi-Kan Cheng +2 more | 2017-08-29 |
| 9659133 | Method, system and computer program product for generating layout for semiconductor device | Yen-Hung Lin, Chi Wei Hu, Chung-Hsing Wang, Chin-Chou Liu | 2017-05-23 |
| 9627310 | Semiconductor device with self-aligned interconnects | Shih-Ming Chang, Ken-Hsien Hsieh, Tsong-Hua Ou, Ru-Gun Liu, Fang-Yu Fan | 2017-04-18 |
| 9558312 | Electromigration resistant standard cell device | Lee-Chung Lu, Wen-Hao Chen, Shen-Feng Chen, Meng-Fu You | 2017-01-31 |
| 9553043 | Interconnect structure having smaller transition layer via | Lee-Chung Lu, Wen-Hao Chen, Fang-Yu Fan, Yu-Hsiang Kao, Dian-Hau Chen +2 more | 2017-01-24 |
| 9543193 | Non-hierarchical metal layers for integrated circuits | Lee-Chung Lu, Shyue-Shyh Lin, Li-Chun Tien, Dian-Hau Chen | 2017-01-10 |