Issued Patents 2017
Showing 1–25 of 28 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9847425 | FinFET with a semiconductor strip as a base | Kuo-Cheng Ching, Shi Ning Ju, Ching-Wei Tsai, Ying-Keung Leung, Carlos H. Diaz | 2017-12-19 |
| 9818872 | Multi-gate device and method of fabrication thereof | Kuo-Cheng Ching, Ching-Wei Tsai, Carlos H. Diaz, Wai-Yi Lien, Ying-Keung Leung | 2017-11-14 |
| 9773786 | FETs and methods of forming FETs | Kuo-Cheng Ching, Chi-Wen Liu | 2017-09-26 |
| 9764950 | Semiconductor arrangement with one or more semiconductor columns | Jean-Pierre Colinge, Ta-Pen Guo, Carlos H. Diaz | 2017-09-19 |
| 9755033 | Semiconductor device and method of forming vertical structure | Wai-Yi Lien, Shi Ning Ju, Kai-Chieh Yang, Wen-Ting Lan | 2017-09-05 |
| 9754840 | Horizontal gate-all-around device having wrapped-around source and drain | Chun-Hsiung Lin, Chung-Cheng Wu, Carlos H. Diaz, Wen-Hsing Hsieh, Yi-Ming Sheu | 2017-09-05 |
| 9741821 | Two-step dummy gate formation | Kuo-Cheng Ching, Kuan-Ting Pan, Ying-Keung Leung, Carlos H. Diaz | 2017-08-22 |
| 9728505 | Methods and structrues of novel contact feature | Wei-Hao Wu, Chia-Hao Chang, Jia-Chuan You, Yi-Hsiung Lin, Zhi-Chang Lin +2 more | 2017-08-08 |
| 9716096 | Semiconductor structure with feature spacer and method for manufacturing the same | Kuo-Cheng Ching, Chun-Hsiung Lin, Ying-Keung Leung, Carlos H. Diaz | 2017-07-25 |
| 9711533 | FinFET devices having different source/drain proximities for input/output devices and non-input/output devices and the method of fabrication thereof | Kuo-Cheng Ching, Ching-Wei Tsai, Ying-Keung Leung | 2017-07-18 |
| 9711595 | Semiconductor device including a semiconductor sheet unit interconnecting a source and a drain | Jiun-Peng Wu, Tetsu Ohtou, Ching-Wei Tsai, Chi-Wen Liu | 2017-07-18 |
| 9711535 | Method of forming FinFET channel | Ching-Wei Tsai, Kuo-Cheng Ching, Jhon Jhy Liaw, Wai-Yi Lien | 2017-07-18 |
| 9711413 | High performance CMOS device design | Shang-Chih Chen, Ching-Wei Tsai, Ta-Wei Wang, Pang-Yen Tsai | 2017-07-18 |
| 9704883 | FETS and methods of forming FETS | Ching-Wei Tsai, Chi-Wen Liu, Kuo-Cheng Ching, Jhon Jhy Liaw, Wai-Yi Lien | 2017-07-11 |
| 9698261 | Vertical device architecture | Jhon Jhy Liaw, Wai-Yi Lien, Jia-Chuan You, Yi-Hsun Chiu, Ching-Wei Tsai +1 more | 2017-07-04 |
| 9698242 | Semiconductor arrangement and formation thereof | Tai-I Yang, Tien-Lu Lin, Wai-Yi Lien, Jiun-Peng Wu | 2017-07-04 |
| 9666672 | FinFET device | Ching-Wei Tsai, Chin-Chi Wang | 2017-05-30 |
| 9659632 | SRAM with stacked bit cells | Ta-Pen Guo, Carlos H. Diaz, Jean-Pierre Colinge | 2017-05-23 |
| 9653457 | Stacked device and associated layout structure | Ta-Pen Guo, Carlos H. Diaz, Jean-Pierre Colinge | 2017-05-16 |
| 9634127 | FinFET device and method for fabricating same | Kuo-Cheng Ching, Gwan Sin Chang, Zhiqiang Wu | 2017-04-25 |
| 9627476 | Fin structure of semiconductor device | Carlos H. Diaz, Kuo-Cheng Ching, Zhiqiang Wu | 2017-04-18 |
| 9614086 | Conformal source and drain contacts for multi-gate field effect transistors | Yee-Chia Yeo, Carlos H. Diaz, Ling-Yen Yeh, Yuan-Chen Sun | 2017-04-04 |
| 9608116 | FINFETs with wrap-around silicide and method forming the same | Kuo-Cheng Ching, Ching-Wei Tsai, Chi-Wen Liu, Ying-Keung Leung | 2017-03-28 |
| 9590102 | Semiconductor device and manufacturing method thereof | Kuo-Cheng Ching, Ching-Wei Tsai, Wai-Yi Lien | 2017-03-07 |
| 9564431 | Semiconductor structures and methods for multi-level work function | Jean-Pierre Colinge, Chia-Wen Liu, Wei-Hao Wu, Carlos H. Diaz | 2017-02-07 |