Issued Patents 2017
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9847425 | FinFET with a semiconductor strip as a base | Kuo-Cheng Ching, Shi Ning Ju, Ching-Wei Tsai, Chih-Hao Wang, Carlos H. Diaz | 2017-12-19 |
| 9818872 | Multi-gate device and method of fabrication thereof | Kuo-Cheng Ching, Ching-Wei Tsai, Carlos H. Diaz, Chih-Hao Wang, Wai-Yi Lien | 2017-11-14 |
| 9818867 | Simple and cost-free MTP structure | Shyue Seng Tan, Yuan-Chen Sun, Eng Huat Toh, Kiok Boone Elgin Quek | 2017-11-14 |
| 9773705 | FinFET channel on oxide structures and related methods | Kuo-Cheng Ching, Ching-Wei Tsai | 2017-09-26 |
| 9741821 | Two-step dummy gate formation | Kuo-Cheng Ching, Kuan-Ting Pan, Chih-Hao Wang, Carlos H. Diaz | 2017-08-22 |
| 9716096 | Semiconductor structure with feature spacer and method for manufacturing the same | Kuo-Cheng Ching, Chun-Hsiung Lin, Chih-Hao Wang, Carlos H. Diaz | 2017-07-25 |
| 9711533 | FinFET devices having different source/drain proximities for input/output devices and non-input/output devices and the method of fabrication thereof | Kuo-Cheng Ching, Ching-Wei Tsai, Chih-Hao Wang | 2017-07-18 |
| 9666581 | FinFET with source/drain structure and method of fabrication thereof | Kuo-Cheng Ching, Ching-Wei Tsai | 2017-05-30 |
| 9614027 | High voltage transistor with reduced isolation breakdown | Shyue Seng Tan | 2017-04-04 |
| 9608116 | FINFETs with wrap-around silicide and method forming the same | Kuo-Cheng Ching, Ching-Wei Tsai, Chi-Wen Liu, Chih-Hao Wang | 2017-03-28 |
| 9559184 | Devices including gate spacer with gap or void and methods of forming the same | Kuo-Cheng Ching, Ching-Wei Tsai, Chi-Wen Liu | 2017-01-31 |