Issued Patents 2017
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9733307 | Optimized chain diagnostic fail isolation | Gerard M. Salem | 2017-08-15 |
| 9712112 | Dynamic noise mitigation in integrated circuit devices using local clock buffers | Miles C. Pedrone, Kirk D. Peterson, John E. Sheets, II | 2017-07-18 |
| 9588177 | Optimizing generation of test configurations for built-in self-testing | Eugene Atwood, Mary P. Kusko, Paul Jacob Logsdon, Franco Motika | 2017-03-07 |
| 9575115 | Methodology of grading reliability and performance of chips across wafer | Nathaniel R. Chadwick, James P. Di Sarro, Robert J. Gauthier, Jr., Tom C. Lee, Junjun Li +2 more | 2017-02-21 |
| 9557381 | Physically aware insertion of diagnostic circuit elements | William V. Huott, Mary P. Kusko, Sridhar H. Rangarajan, Robert C. Redburn | 2017-01-31 |