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USPTO Patent Rankings Data through Dec 31, 2025
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Guillaume Bouche — 25 Patents in 2016

Globalfoundries: 24 patents #14 of 2,145Top 1%
MPMaxim Integrated Products: 1 patents #61 of 197Top 35%
Portland, OR: #6 of 1,621 inventorsTop 1%
Oregon: #9 of 4,070 inventorsTop 1%
Overall (2016): #853 of 481,213Top 1%
25 Patents 2016

Issued Patents 2016

Showing 1–25 of 25 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
9530689 Methods for fabricating integrated circuits using multi-patterning processes Deniz E. Civay, Jason E. Stephens, Jiong Li, Richard A. Farrell 2016-12-27 $8,113,000
9520395 FinFET devices comprising a dielectric layer/CMP stop layer/hardmask/etch stop layer/gap-fill material stack Andy Wei, Xiang Hu, Jerome F. Wandell, Sandeep Gaan 2016-12-13 $16,443,000
9508642 Self-aligned back end of line cut Andy Wei, Mark A. Zaleski 2016-11-29 $4,439,000
9502528 Borderless contact formation through metal-recess dual cap integration Jason E. Stephens, Tuhin Guha Neogi, Mark A. Zaleski, Andy Wei 2016-11-22 $8,427,000
9502293 Self-aligned via process flow Andy Wei, Sudharshanan Raghunthathan 2016-11-22 $8,427,000
9490340 Methods of forming nanowire devices with doped extension regions and the resulting devices Shao-Ming Koh, Jing Wan, Andy Wei 2016-11-08 $4,991,000
9461128 Method for creating self-aligned transistor contacts Mark A. Zaleski, Andy Wei, Jason E. Stephens, Tuhin Guha Neogi 2016-10-04 $4,373,000
9460963 Self-aligned contacts and methods of fabrication Gabriel Padron Wells, Xiang Hu, Andre P. Labonte 2016-10-04 $4,373,000
9455204 10 nm alternative N/P doped fin for SSRW scheme Huy Cao, Jinping Liu, Huang Liu 2016-09-27 $3,712,000
9450074 LDMOS with field plate connected to gate Fanling H. Yang, Timothy K. McGuire, Sudarsan Uppili 2016-09-20 $30,105,000
9443931 Fabricating stacked nanowire, field-effect transistors Hui Zang, Gabriel Padron Wells 2016-09-13 $3,651,000
9431512 Methods of forming nanowire devices with spacers and the resulting devices Shao-Ming Koh, Jing Wan, Andy Wei 2016-08-30 $3,218,000
9425097 Cut first alternative for 2D self-aligned via Andy Wei, Sudharshanan Raghunathan 2016-08-23 $3,675,000
9412655 Forming merged lines in a metallization layer by replacing sacrificial lines with conductive lines Jason E. Stephens, Vikrant Chauhan, Andy Wei 2016-08-09 $2,792,000
9406775 Method for creating self-aligned compact contacts in an IC device meeting fabrication spacing constraints Andy Wei, Youngtag Woo 2016-08-02 $3,259,000
9397004 Methods for fabricating FinFET integrated circuits with simultaneous formation of local contact openings Erik Geiss, Scott Beasor, Andy Wei, Deniz E. Civay 2016-07-19 $2,452,000
9390979 Opposite polarity borderless replacement metal contact scheme Andy Wei, Huy Cao, Jing Wan 2016-07-12 $2,207,000
9362165 2D self-aligned via first process flow Andy Wei, Sudharshanan Raghunathan 2016-06-07 $2,066,000
9305785 Semiconductor contacts and methods of fabrication Andy Wei, Gabriel Padron Wells, Xiang Hu 2016-04-05 $1,295,000
9306019 Integrated circuits with nanowires and methods of manufacturing the same Jing Wan, Andy Wei, Shao-Ming Koh 2016-04-05 $1,295,000
9293462 Integrated circuits with dual silicide contacts and methods for fabricating same Shao-Ming Koh, Jeremy A. Wahl, Andy Wei 2016-03-22 $709,000
9276064 Fabricating stacked nanowire, field-effect transistors Hui Zang, Gabriel Padron Wells 2016-03-01 $579,000
9275896 Methods for fabricating integrated circuits using directed self-assembly Deniz E. Civay, Ji Xu, Gerard Schmid, Richard A. Farrell 2016-03-01 $579,000
9263325 Precut metal lines Andy Wei, Mark A. Zaleski 2016-02-16 $417,000
9236437 Method for creating self-aligned transistor contacts Mark A. Zaleski, Andy Wei, Jason E. Stephens, Tuhin Guha Neogi 2016-01-12 $510,000