Issued Patents 2011
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8042070 | Methods and system for analysis and management of parametric yield | James A. Culp, Paul Chang, Dureseti Chidambarrao, Praveen Elakkumanan, Anda C. Mocuta | 2011-10-18 |
| 8010916 | Test yield estimate for semiconductor products created from a library | Jeanne P. Bickford, Markus Buehler, Juergen Koehl | 2011-08-30 |
| 7984394 | Design structure for a redundant micro-loop structure for use in an integrated circuit physical design process and method of forming the same | Brent A. Anderson, Jeanne P. Bickford, Markus Buehler, Juergen Koehl, Edward J. Nowak | 2011-07-19 |
| 7960836 | Redundant micro-loop structure for use in an integrated circuit physical design process and method of forming the same | Brent A. Anderson, Jeanne P. Bickford, Markus Buehler, Juergen Koehl, Edward J. Nowak | 2011-06-14 |
| 7882463 | Integrated circuit selective scaling | Fook-Luen Heng, Kevin W. McCullen, Rani Narayan, Stephen L. Runyon, Robert F. Walker | 2011-02-01 |
| 7865848 | Layout optimization using parameterized cells | Veit Gernhoefer, Michael S. Gray, Matthew T. Guzowski, Stephen L. Runyon, Robert F. Walker +1 more | 2011-01-04 |