Issued Patents 2011
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8020120 | Layout quality gauge for integrated circuit design | Mark A. Lavin, Jin-Fuw Lee, Thomas Ludwig, Rama Nand Sing, Fanchieh Yee | 2011-09-13 |
| 7962865 | System and method for employing patterning process statistics for ground rules waivers and optimization | Mark A. Lavin, Jin-Fuw Lee, Chieh-Yu Lin, Jawahar P. Nayak, Rama N. Singh | 2011-06-14 |
| 7882463 | Integrated circuit selective scaling | Jason D. Hibbeler, Kevin W. McCullen, Rani Narayan, Stephen L. Runyon, Robert F. Walker | 2011-02-01 |