Issued Patents 2011
Showing 1–25 of 46 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8080465 | Semiconductor wafer structure with balanced reflectance and absorption characteristics for rapid thermal anneal uniformity | Edward J. Nowak | 2011-12-20 |
| 8080485 | Localized temperature control during rapid thermal anneal | Edward J. Nowak | 2011-12-20 |
| 8076204 | Graphene-based transistor | Edward J. Nowak | 2011-12-13 |
| 8053870 | Semiconductor structure incorporating multiple nitride layers to improve thermal dissipation away from a device and a method of forming the structure | Joseph M. Lukaitis, Jed H. Rankin, Robert R. Robison | 2011-11-08 |
| 8053348 | Method of forming a semiconductor device using a sacrificial uniform vertical thickness spacer structure | Edward J. Nowak | 2011-11-08 |
| 8053318 | FET with replacement gate structure and method of fabricating the same | Edward J. Nowak | 2011-11-08 |
| 8053314 | Asymmetric field effect transistor structure and method | Andres Bryant, William F. Clark, Jr., Edward J. Nowak | 2011-11-08 |
| 8039908 | Damascene gate having protected shorting regions | Edward J. Nowak, Jed H. Rankin | 2011-10-18 |
| 8039929 | Asymmetrically stressed CMOS FinFET | Edward J. Nowak | 2011-10-18 |
| 8036022 | Structure and method of using asymmetric junction engineered SRAM pass gates, and design structure | Edward J. Nowak | 2011-10-11 |
| 8028924 | Device and method for providing an integrated circuit with a unique identification | Andres Bryant, Alain Loiseau, Anthony K. Stamper, Mickey H. Yu | 2011-10-04 |
| 8022478 | Method of forming a multi-fin multi-gate field effect transistor with tailored drive current | Edward J. Nowak | 2011-09-20 |
| 8021803 | Multi-chip reticle photomasks | Jed H. Rankin | 2011-09-20 |
| 8003516 | BEOL interconnect structures and related fabrication methods | Edward J. Nowak, Jed H. Rankin | 2011-08-23 |
| 8003463 | Structure, design structure and method of manufacturing dual metal gate Vt roll-up structure | Edward J. Nowak | 2011-08-23 |
| 7994612 | FinFETs single-sided implant formation | Andres Bryant, Josephine B. Chang, Omer H. Dokumaci, Edward J. Nowak | 2011-08-09 |
| 7993989 | Vertical spacer forming and related transistor | Edward J. Nowak | 2011-08-09 |
| 7982269 | Transistors having asymmetric strained source/drain portions | Andres Bryant, Edward J. Nowak | 2011-07-19 |
| 7984394 | Design structure for a redundant micro-loop structure for use in an integrated circuit physical design process and method of forming the same | Jeanne P. Bickford, Markus Buehler, Jason D. Hibbeler, Juergen Koehl, Edward J. Nowak | 2011-07-19 |
| 7981772 | Methods of fabricating nanostructures | Andres Bryant, Edward J. Nowak, Jeffrey W. Sleight | 2011-07-19 |
| 7979836 | Split-gate DRAM with MuGFET, design structure, and method of manufacture | Edward J. Nowak | 2011-07-12 |
| 7971158 | Spacer fill structure, method and design structure for reducing device variation | Andres Bryant, Edward J. Nowak, Jed H. Rankin | 2011-06-28 |
| 7964922 | Structure, design structure and method of manufacturing dual metal gate VT roll-up structure | Edward J. Nowak | 2011-06-21 |
| 7964465 | Transistors having asymmetric strained source/drain portions | Andres Bryant, Edward J. Nowak | 2011-06-21 |
| 7964467 | Method, structure and design structure for customizing history effects of soi circuits | Edward J. Nowak | 2011-06-21 |