Issued Patents 2011
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8080866 | 3-D integrated semiconductor device comprising intermediate heat spreading capabilities | Thomas Werner, Michael Grillberger | 2011-12-20 |
| 8048811 | Method for patterning a metallization layer by reducing resist strip induced damage of the dielectric material | Thomas Werner, Juergen Boemmels | 2011-11-01 |
| 8048736 | Semiconductor device comprising a capacitor in the metallization system and a method of forming the capacitor | Thomas Werner, Kai Frohberg | 2011-11-01 |
| 8040497 | Method and test structure for estimating focus settings in a lithography process based on CD measurements | Thomas Werner, Kai Frohberg | 2011-10-18 |
| 8039398 | Method of reducing non-uniformities during chemical mechanical polishing of excess metal in a metallization level of microstructure devices | Robert Seidel, Juergen Boemmels | 2011-10-18 |
| 8030209 | Enhancing structural integrity of low-k dielectrics in metallization systems of semiconductor devices by using a crack suppressing material layer | Thomas Werner, Kai Frohberg | 2011-10-04 |
| 7989352 | Technique for reducing plasma-induced etch damage during the formation of vias in interlayer dielectrics | Kai Frohberg, Thomas Werner | 2011-08-02 |
| 7977237 | Fabricating vias of different size of a semiconductor device by splitting the via patterning process | Thomas Werner, Kai Frohberg | 2011-07-12 |
| 7955962 | Method of reducing contamination by providing a removable polymer protection film during microstructure processing | Ralf Richter, Thomas Werner, Kai Frohberg | 2011-06-07 |
| 7932166 | Field effect transistor having a stressed contact etch stop layer with reduced conformality | Kai Frohberg, Thomas Werner | 2011-04-26 |
| 7928004 | Nano imprint technique with increased flexibility with respect to alignment and feature shaping | Robert Seidel, Carsten Peters | 2011-04-19 |
| 7915170 | Reducing contamination of semiconductor substrates during beol processing by providing a protection layer at the substrate edge | Su Ruo Qing, Carsten Peters | 2011-03-29 |
| 7910496 | Technique for forming an interlayer dielectric material of increased reliability above a structure including closely spaced lines | Kai Frohberg, Carsten Peters | 2011-03-22 |
| 7879709 | Semiconductor structure comprising an electrically conductive feature and method of forming a semiconductor structure | Tobias Letz, Carsten Peters | 2011-02-01 |