Issued Patents 2005
Showing 1–21 of 21 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6980824 | Method and system for optimizing transmission and reception power levels in a communication system | Brian L. Ji, Karl D. Selander, Michael A. Sorna | 2005-12-27 |
| 6967416 | Shared on-chip decoupling capacitor and heat-sink devices | Lawrence A. Clevenger, Amy Hsu, Kwong Hon Wong | 2005-11-22 |
| 6964908 | Metal-insulator-metal capacitor and method of fabricating same | Rajiv V. Joshi, Chun-Yung Sung | 2005-11-15 |
| 6964892 | N-channel metal oxide semiconductor (NMOS) driver circuit and method of making same | Lawrence A. Clevenger, Rama Divakaruni, Yujun Li | 2005-11-15 |
| 6958522 | Method to fabricate passive components using conductive polymer | Lawrence A. Clevenger, Carl Radens, Li-Kong Wang, Kwong Hon Wong | 2005-10-25 |
| 6941414 | High speed embedded DRAM with SRAM-like interface | William Wu Shen, Li-Kong Wang | 2005-09-06 |
| 6937054 | Programmable peaking receiver and method | Karl D. Selander, Michael A. Sorna, William F. Washburn, Huihao Xu, Steven J. Zier | 2005-08-30 |
| 6934182 | Method to improve cache capacity of SOI and bulk | Yuen H. Chan, Rajiv V. Joshi, Robert C. Wong | 2005-08-23 |
| 6933189 | Integration system via metal oxide conversion | Lawrence A. Clevenger, Carl Radens, Joseph F. Shepard, Jr. | 2005-08-23 |
| 6911354 | Polymer thin-film transistor with contact etch stops | Tricia Breen, Lawrence A. Clevenger, Li-Kong Wang, Kwong Hon Wong | 2005-06-28 |
| 6911375 | Method of fabricating silicon devices on sapphire with wafer bonding at low temperature | Kathryn Guarini, Leathen Shi, Dinkar Singh, Li-Kong Wang | 2005-06-28 |
| 6909145 | Metal spacer gate for CMOS FET | Cyril Cabral, Jr., Lawrence A. Clevenger, Joseph F. Shepard, Jr., Kwong Hon Wong | 2005-06-21 |
| 6910165 | Digital random noise generator | Howard H. Chen, Li-Kong Wang, Sang Hoo Dhong, Tin-Chee Lo | 2005-06-21 |
| 6906354 | T-RAM cell having a buried vertical thyristor and a pseudo-TFT transfer gate and method for fabricating the same | Rajiv V. Joshi, Fariborz Assaderaghi | 2005-06-14 |
| 6897712 | Apparatus and method for detecting loss of high-speed signal | Westerfield J. Ficken, James S. Mason, Phil J. Murfet | 2005-05-24 |
| 6891357 | Reference current generation system and method | Hibourahima Camara, Karl D. Selander, Michael A. Sorna | 2005-05-10 |
| 6876250 | Low-power band-gap reference and temperature sensor circuit | Rajiv V. Joshi, Russell J. Houghton | 2005-04-05 |
| 6876557 | Unified SRAM cache system for an embedded DRAM system having a micro-cell architecture | Rajiv V. Joshi | 2005-04-05 |
| 6869846 | Forming electronic structures having dual dielectric thicknesses and the structure so formed | Jack A. Mandelman, Carl Radens, Richard Strub, William R. Tonti | 2005-03-22 |
| 6869895 | Method for adjusting capacitance of an on-chip capacitor | Lawrence A. Clevenger, Timothy J. Dalton, Carl Radens, Keith Kwong Hon Wong, Chih-Chao Yang | 2005-03-22 |
| 6864504 | Planar polymer transistor | Tricia Breen, Lawrence A. Clevenger, Li-Kong Wang, Kwong Hon Wong | 2005-03-08 |