Issued Patents 2005
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6964908 | Metal-insulator-metal capacitor and method of fabricating same | Louis L. Hsu, Chun-Yung Sung | 2005-11-15 |
| 6952113 | Method of reducing leakage current in sub one volt SOI circuits | Richard B. Brown, Ching-Te Chuang, Peter W. Cook, Koushik K. Das | 2005-10-04 |
| 6943105 | Soft metal conductor and method of making | — | 2005-09-13 |
| 6934182 | Method to improve cache capacity of SOI and bulk | Yuen H. Chan, Louis L. Hsu, Robert C. Wong | 2005-08-23 |
| 6921982 | FET channel having a strained lattice structure along multiple surfaces | Richard Q. Williams | 2005-07-26 |
| 6920061 | Loadless NMOS four transistor dynamic dual Vt SRAM cell | Azeez Bhavnagarwala, Stephen V. Kosonocky | 2005-07-19 |
| 6906354 | T-RAM cell having a buried vertical thyristor and a pseudo-TFT transfer gate and method for fabricating the same | Louis L. Hsu, Fariborz Assaderaghi | 2005-06-14 |
| 6876557 | Unified SRAM cache system for an embedded DRAM system having a micro-cell architecture | Louis L. Hsu | 2005-04-05 |
| 6876250 | Low-power band-gap reference and temperature sensor circuit | Louis L. Hsu, Russell J. Houghton | 2005-04-05 |
| 6868000 | Coupled body contacts for SOI differential circuits | Yuen H. Chan, Antonio R. Pelella | 2005-03-15 |
| 6864540 | High performance FET with elevated source/drain region | Rama Divakaruni, Louis C. Hsu, Carl Radens | 2005-03-08 |