Issued Patents 2005
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6972237 | Lateral heterojunction bipolar transistor and method of manufacture using selective epitaxial growth | Purakh Raj Verma, Shao-fu Sanford Chu, Lap Chan, Jian Xun Li | 2005-12-06 |
| 6924202 | Heterojunction bipolar transistor with self-aligned emitter and sidewall base contact | Jian Xun Li, Lap Chan, Purakh Raj Verma, Shao-fu Sanford Chu | 2005-08-02 |
| 6908824 | Self-aligned lateral heterojunction bipolar transistor | Jian Xun Li, Lap Chan, Purakh Raj Verma, Shao-fu Sanford Chu | 2005-06-21 |
| 6903013 | Method to fill a trench and tunnel by using ALD seed layer and electroless plating | Lap Chan, Sanford Chu, Chit Hwei Ng, Yong Ju | 2005-06-07 |
| 6897111 | Method using quasi-planar double gated fin field effect transistor process for the fabrication of a thyristor-based static read/write random-access memory | Elgin Quek, Pradeep Ramachandramurthy Yelehanka, Weining Li | 2005-05-24 |
| 6881976 | Heterojunction BiCMOS semiconductor | Lap Chan, Shao-fu Sanford Chu | 2005-04-19 |
| 6869884 | Process to reduce substrate effects by forming channels under inductor devices and around analog blocks | Lap Chan, Sanford Chu, Chit Hwei Ng, Purakh Raj Verma, Johnny Kok Wai Chew +1 more | 2005-03-22 |
| 6861317 | Method of making direct contact on gate by using dielectric stop layer | Purakh Raj Verma, Sanford Chu, Lap Chan, Yelehanka Ramachandramurthy Pradeep, Kai Shao | 2005-03-01 |
| 6849481 | Thyristor-based SRAM and method for the fabrication thereof | Elgin Quek, Pradeep Ramachandramurthy Yelehanka, Tommy Lai, Weining Li | 2005-02-01 |
| 6841441 | Method to produce dual gates (one metal and one poly or metal silicide) for CMOS devices using sputtered metal deposition, metallic ion implantation, or silicon implantation, and laser annealing | Chew Hoe Ang, Eng Hua Lim, Randall Cher Liang Cha, Elgin Quek, Mei Sheng Zhou +1 more | 2005-01-11 |