Issued Patents 2005
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6969646 | Method of activating polysilicon gate structure dopants after offset spacer deposition | Francis Benistant | 2005-11-29 |
| 6946349 | Method for integrating a SONOS gate oxide transistor into a logic/analog integrated circuit having several gate oxide thicknesses | Jae Gon Lee, Hwa Weng Koh, Dong Kyun Sohn | 2005-09-20 |
| 6924180 | Method of forming a pocket implant region after formation of composite insulator spacers | — | 2005-08-02 |
| 6897111 | Method using quasi-planar double gated fin field effect transistor process for the fabrication of a thyristor-based static read/write random-access memory | Jia Zhen Zheng, Pradeep Ramachandramurthy Yelehanka, Weining Li | 2005-05-24 |
| 6849481 | Thyristor-based SRAM and method for the fabrication thereof | Pradeep Ramachandramurthy Yelehanka, Jia Zhen Zheng, Tommy Lai, Weining Li | 2005-02-01 |
| 6841441 | Method to produce dual gates (one metal and one poly or metal silicide) for CMOS devices using sputtered metal deposition, metallic ion implantation, or silicon implantation, and laser annealing | Chew Hoe Ang, Eng Hua Lim, Randall Cher Liang Cha, Jia Zhen Zheng, Mei Sheng Zhou +1 more | 2005-01-11 |