Issued Patents 2005
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6964875 | Array of gate dielectric structures to measure gate dielectric thickness and parasitic capacitance | Mark W. Michael, Hai Hong Wang, Simon S. Chan | 2005-11-15 |
| 6933579 | Semiconductor solid phase epitaxy damage control method and integrated circuit produced thereby | Witold P. Maszara, Mario M. Pelella | 2005-08-23 |
| 6905971 | Treatment of dielectric material to enhance etch rate | Cyrus E. Tabery, Chih-Yuh Yang, Joong S. Jeon, Minh Van Ngo, Ming-Ren Lin | 2005-06-14 |
| 6867130 | Enhanced silicidation of polysilicon gate electrodes | Olov Karlsson, Simon S. Chan, Mark W. Michael | 2005-03-15 |
| 6841832 | Array of gate dielectric structures to measure gate dielectric thickness and parasitic capacitance | Mark W. Michael, Hai Hong Wang, Simon S. Chan | 2005-01-11 |