Issued Patents All Time
Showing 51–75 of 90 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6127811 | Micro-electromechanical system and voltage shifter, method of synchronizing an electronic system and a micromechanical system of a micro-electromechanical system | Jayarama N. Shenoy | 2000-10-03 |
| 6093658 | Method for making reliable interconnect structures | Harlan Lee Sur, Jr., Victor Chiang Liang | 2000-07-25 |
| 6080661 | Methods for fabricating gate and diffusion contacts in self-aligned contact processes | — | 2000-06-27 |
| 6077762 | Method and apparatus for rapidly discharging plasma etched interconnect structures | Victor Chiang Liang, Harlan Lee Sur, Jr. | 2000-06-20 |
| 6057224 | Methods for making semiconductor devices having air dielectric interconnect structures | Ling Qian | 2000-05-02 |
| 6054378 | Method for encapsulating a metal via in damascene | Stephen L. Skala | 2000-04-25 |
| 6046102 | Moisture barrier gap fill structure and method for making the same | Ling Qian | 2000-04-04 |
| 6034434 | Optimized underlayer structures for maintaining chemical mechanical polishing removal rates | Milind Weling | 2000-03-07 |
| 6030885 | Hexagonal semiconductor die, semiconductor substrates, and methods of forming a semiconductor die | — | 2000-02-29 |
| 6028013 | Moisture repellant integrated circuit dielectric material combination | Rao Annapragada, Samuel V. Dunton, Milind Weling | 2000-02-22 |
| 6020647 | Composite metallization structures for improved post bonding reliability | Stephen L. Skala, Dipu Pramanik, William K. Shu | 2000-02-01 |
| 6020616 | Automated design of on-chip capacitive structures for suppressing inductive noise | Paul R. Findley | 2000-02-01 |
| 6013927 | Semiconductor structures for suppressing gate oxide plasma charging damage and methods for making the same | Harlan Lee Sur, Jr. | 2000-01-11 |
| 6013536 | Apparatus for automated pillar layout and method for implementing same | Edward D. Nowak | 2000-01-11 |
| 6010939 | Methods for making shallow trench capacitive structures | — | 2000-01-04 |
| 5985749 | Method of forming a via hole structure including CVD tungsten silicide barrier layer | Xi-Wei Lin | 1999-11-16 |
| 5981378 | Reliable interconnect via structures and methods for making the same | — | 1999-11-09 |
| 5976987 | In-situ corner rounding during oxide etch for improved plug fill | Ian Robert Harvey, Calvin T. Gabriel | 1999-11-02 |
| 5965941 | Use of dummy underlayers for improvement in removal rate consistency during chemical mechanical polishing | Milind Weling, Calvin T. Gabriel | 1999-10-12 |
| 5965218 | Process for manufacturing ultra-sharp atomic force microscope (AFM) and scanning tunneling microscope (STM) tips | Ling Qian | 1999-10-12 |
| 5963784 | Methods of determining parameters of a semiconductor device and the width of an insulative spacer of a semiconductor device | Xi-Wei Lin | 1999-10-05 |
| 5933020 | Parasitic resistance measuring device | — | 1999-08-03 |
| 5928968 | Semiconductor pressure transducer structures and methods for making the same | Harlan Lee Sur, Jr. | 1999-07-27 |
| 5916016 | Methods and apparatus for polishing wafers | — | 1999-06-29 |
| 5915203 | Method for producing deep submicron interconnect vias | Samit Sengupta | 1999-06-22 |