Issued Patents All Time
Showing 51–75 of 77 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5972789 | Method for fabricating reduced contacts using retardation layers | Hao Liu | 1999-10-26 |
| 5968711 | Method of dry etching A1Cu using SiN hard mask | I-Ping Lee | 1999-10-19 |
| 5962195 | Method for controlling linewidth by etching bottom anti-reflective coating | Tzu-Shih Yen | 1999-10-05 |
| 5956594 | Method for simultaneously forming capacitor plate and metal contact structures for a high density DRAM device | Fu-Liang Yang, Bi-Ling Chen | 1999-09-21 |
| 5952156 | Enhanced reflectivity coating (ERC) for narrow aperture width contact and interconnection lithography | Arthur CHIN, Sen-Huan Huang | 1999-09-14 |
| 5915198 | Contact process using taper contact etching and polycide step | Jun-Cheng Ko | 1999-06-22 |
| 5906948 | Method for etching high aspect-ratio multilevel contacts | Hao Liu | 1999-05-25 |
| 5905293 | LDD spacers in MOS devices with double spacers | Ing-Ruey Liaw | 1999-05-18 |
| 5904521 | Method of forming a dynamic random access memory | Yue Chen | 1999-05-18 |
| 5895239 | Method for fabricating dynamic random access memory (DRAM) by simultaneous formation of tungsten bit lines and tungsten landing plug contacts | Hung-Yi Luo | 1999-04-20 |
| 5893734 | Method for fabricating capacitor-under-bit line (CUB) dynamic random access memory (DRAM) using tungsten landing plug contacts | Kwong-Jr Tsai | 1999-04-13 |
| 5837576 | Method for forming a capacitor using a silicon oxynitride etching stop layer | Li-Yeat Chen, Jin CHEN, Ing-Ruey Liaw | 1998-11-17 |
| 5834359 | Method of forming an isolation region in a semiconductor substrate | Fu-Liang Yang | 1998-11-10 |
| 5817579 | Two step plasma etch method for forming self aligned contact | Jun-Cheng Ko | 1998-10-06 |
| 5804489 | Method of manufacturing a crown shape capacitor in semiconductor memory using a single step etching | Fu-Liang Yang, Yu-Chun Ho, Bin Liu, Chao-Ming Koh | 1998-09-08 |
| 5804852 | Stacked capacitor DRAM structure featuring a multiple crown shaped polysilicon lower electrode | Fu-Liang Yang | 1998-09-08 |
| 5792687 | Method for fabricating high density integrated circuits using oxide and polysilicon spacers | Ing-Ruey Liaw | 1998-08-11 |
| 5792689 | Method for manufacturing double-crown capacitors self-aligned to node contacts on dynamic random access memory | Fu-Liang Yang | 1998-08-11 |
| 5789289 | Method for fabricating vertical fin capacitor structures | — | 1998-08-04 |
| 5780338 | Method for manufacturing crown-shaped capacitors for dynamic random access memory integrated circuits | Tzu-Shih Yen | 1998-07-14 |
| 5763312 | Method of fabricating LDD spacers in MOS devices with double spacers and device manufactured thereby | Ing-Ruey Liaw | 1998-06-09 |
| 5721154 | Method for fabricating a four fin capacitor structure | — | 1998-02-24 |
| 5710073 | Method for forming interconnections and conductors for high density integrated circuits | Ing-Ruey Liaw | 1998-01-20 |
| 5706164 | Method of fabricating high density integrated circuits, containing stacked capacitor DRAM devices, using elevated trench isolation and isolation spacers | — | 1998-01-06 |
| 5688713 | Method of manufacturing a DRAM cell having a double-crown capacitor using polysilicon and nitride spacers | Kung Linliu, Tzu-Shih Yen | 1997-11-18 |