Issued Patents All Time
Showing 26–50 of 76 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9917038 | Semiconductor package with multiple molding routing layers and a method of manufacturing the same | Suebphong Yenrudee | 2018-03-13 |
| 9899208 | Molded leadframe substrate semiconductor package | Somchai Nondhasitthichai | 2018-02-20 |
| 9818676 | Singulation method for semiconductor package with plating on side of connectors | Somchai Nondhasitthichai | 2017-11-14 |
| 9805955 | Semiconductor package with multiple molding routing layers and a method of manufacturing the same | Suebphong Yenrudee | 2017-10-31 |
| 9773722 | Semiconductor package with partial plating on contact side surfaces | Somchai Nondhasitthichai, Woraya Benjavasukul | 2017-09-26 |
| 9761435 | Flip chip cavity package | Somchai Nondhasitthichai | 2017-09-12 |
| 9741642 | Semiconductor package with partial plating on contact side surfaces | Somchai Nondhasitthichai, Woraya Benjasukul | 2017-08-22 |
| 9711343 | Molded leadframe substrate semiconductor package | Somchai Nondhasitthichai | 2017-07-18 |
| 9564387 | Semiconductor package having routing traces therein | Antonio B. Dimaano, Jr., Rui Huang | 2017-02-07 |
| 9449900 | Leadframe feature to minimize flip-chip semiconductor die collapse during flip-chip reflow | Suebphong Yenrudee | 2016-09-20 |
| 9449905 | Plated terminals with routing interconnections semiconductor device | — | 2016-09-20 |
| 9397031 | Post-mold for semiconductor package having exposed traces | — | 2016-07-19 |
| 9355940 | Auxiliary leadframe member for stabilizing the bond wire process | — | 2016-05-31 |
| 9349679 | Singulation method for semiconductor package with plating on side of connectors | Somchai Nondhasitthichai | 2016-05-24 |
| 9196504 | Thermal leadless array package with die attach pad locking feature | Albert Loh, Edward Then, Serafin P. Pedron, Jr. | 2015-11-24 |
| 9196470 | Molded leadframe substrate semiconductor package | Somchai Nondhasitthichai | 2015-11-24 |
| 9099294 | Molded leadframe substrate semiconductor package | Somchai Nondhasitthichai | 2015-08-04 |
| 9099317 | Method for forming lead frame land grid array | Somchai Nondhasitthichai | 2015-08-04 |
| 9093486 | Molded leadframe substrate semiconductor package | Somchai Nondhasitthichai | 2015-07-28 |
| 9082607 | Molded leadframe substrate semiconductor package | Somchai Nondhasitthichai | 2015-07-14 |
| 9029198 | Methods of manufacturing semiconductor devices including terminals with internal routing interconnections | Suebphong Yenrudee | 2015-05-12 |
| 9006034 | Post-mold for semiconductor package having exposed traces | — | 2015-04-14 |
| 9000590 | Protruding terminals with internal routing interconnections semiconductor device | Suebphong Yenrudee | 2015-04-07 |
| 8871571 | Apparatus for and methods of attaching heat slugs to package tops | — | 2014-10-28 |
| 8816482 | Flip-chip leadframe semiconductor package | Kasemsan Kongthaworn | 2014-08-26 |