Issued Patents All Time
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7015740 | Self-adjusting programmable on-chip clock aligner | Eugene M. Feinberg, Philip Manela | 2006-03-21 |
| 5819072 | Method of using a four-state simulator for testing integrated circuit designs having variable timing constraints | Louis Bernard Bushard, Peter B. Criswell, Douglas A. Fuller, James E. Rezek | 1998-10-06 |
| 5696693 | Method for placing logic functions and cells in a logic design using floor planning by analogy | Mark D. Aubel, Arthur F. Boehm, Joseph P. Kerzman, James E. Rezek, John T. Rusterholz | 1997-12-09 |
| 4947393 | Activity verification system for memory or logic | Larry L. Byers, Wayne A. Michaelson | 1990-08-07 |
| 4933908 | Fault detection in memory refreshing system | Larry L. Byers, Wayne A. Michaelson | 1990-06-12 |