Issued Patents All Time
Showing 1–21 of 21 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10658211 | Data structures for semiconductor die packaging | Joseph Anthony Boduch, Sandia You Ni Chiu, Robert Daniel Orr | 2020-05-19 |
| 10068786 | Data structures for semiconductor die packaging | Joseph Anthony Boduch, Sandia You Ni Chiu, Robert Daniel Orr | 2018-09-04 |
| 8802519 | Work function adjustment with the implant of lanthanides | Manfred Ramin, Husam N. Alshareef | 2014-08-12 |
| 8749115 | Dynamically adjustable orthotic device | Sylvia D. Pas | 2014-06-10 |
| 8748246 | Integration scheme for dual work function metal gates | Manfred Ramin | 2014-06-10 |
| 8629021 | Integration scheme for an NMOS metal gate | — | 2014-01-14 |
| 8525386 | Dynamically adjustable orthotic device | Sylvia D. Pas | 2013-09-03 |
| 8409943 | Work function adjustment with the implant of lanthanides | Manfred Ramin, Husam N. Alshareef | 2013-04-02 |
| 8304342 | Sacrificial CMP etch stop layer | Manfred Ramin | 2012-11-06 |
| 8304333 | Method of forming a high-k gate dielectric layer | Manfred Ramin, Husam N. Alshareef | 2012-11-06 |
| 8114728 | Integration scheme for an NMOS metal gate | — | 2012-02-14 |
| 7858459 | Work function adjustment with the implant of lanthanides | Manfred Ramin, Husam N. Alshareef | 2010-12-28 |
| 7807522 | Lanthanide series metal implant to control work function of metal gate electrodes | Husam N. Alshareef, Manfred Ramin | 2010-10-05 |
| 7799669 | Method of forming a high-k gate dielectric layer | Manfred Ramin, Husam N. Alshareef | 2010-09-21 |
| 7795097 | Semiconductor device manufactured by removing sidewalls during replacement gate integration scheme | — | 2010-09-14 |
| 7642153 | Methods for forming gate electrodes for integrated circuits | — | 2010-01-05 |
| 7629212 | Doped WGe to form dual metal gates | Manfred Ramin, Mark Visokay | 2009-12-08 |
| 7531398 | Methods and devices employing metal layers in gates to introduce channel strain | Zhibo Zhang, Cloves Rinn Cleavelin, Stephanie W. Butler, Mike Watson Goodwin, Satyavolu Srinivas Papa Rao | 2009-05-12 |
| 7416949 | Fabrication of transistors with a fully silicided gate electrode and channel strain | Shaofeng Yu | 2008-08-26 |
| 6054684 | Ultra fast temperature ramp up and down in a furnace using interleaving shutters | C. Rinn Cleavelin, Sylvia D. Pas | 2000-04-25 |
| 5803980 | De-ionized water/ozone rinse post-hydrofluoric processing for the prevention of silicic acid residue | Jin Goo Park | 1998-09-08 |