Issued Patents All Time
Showing 26–37 of 37 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7564077 | Performance and area scalable cell architecture technology | Uming Ko, Dharin N. Shah, Senthil Kumar Sundaramoorthy, Girishankar Gurumurthy, Sumanth Katte Gururajarao +1 more | 2009-07-21 |
| 6909301 | Oscillation based access time measurement | Steven Korson, Brian D. Borchers, Bryan Sheffield, Doug Counce | 2005-06-21 |
| 6781411 | Flip flop with reduced leakage current | Donald E. Steiss, Peter Cumming, Christopher Michael Barr | 2004-08-24 |
| 6771118 | System and method for reducing a leakage current associated with an integrated circuit | Vipul Kumar Singhal | 2004-08-03 |
| 6734743 | Oscillation based cycle time measurement | Steven Korson, Brian D. Borchers, Bryan Sheffield, Doug Counce | 2004-05-11 |
| 6581201 | Method for power routing and distribution in an integrated circuit with multiple interconnect layers | Francisco A. Cano, David Thomas | 2003-06-17 |
| 6380593 | Automated well-tie and substrate contact insertion methodology | Jay A. Maxey, Kevin M. Ovens | 2002-04-30 |
| 6308307 | Method for power routing and distribution in an integrated circuit with multiple interconnect layers | Francisco A. Cano, David Thomas | 2001-10-23 |
| 5612632 | High speed flip-flop for gate array | Shivaling S. Mahant-Shetti, Kevin M. Ovens, Robert C. Martin, Robert J. Landers | 1997-03-18 |
| 5430408 | Transmission gate circuit | Kevin M. Ovens, Bob Helmick | 1995-07-04 |
| 5381455 | Interleaved shift register | Kevin M. Ovens, Bob Helmick | 1995-01-10 |
| 5250852 | Circuitry and method for latching a logic state | Kevin M. Ovens | 1993-10-05 |