Issued Patents All Time
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12244304 | Switch circuit | — | 2025-03-04 |
| 11320478 | Methods of testing multiple dies | Rubin Ajit Parekhji, Mahesh M. Mehendale, Vinod Menezes | 2022-05-03 |
| 11190105 | Single inductor multiple output regulator | RR Manikandan, Rajat Chauhan, Vinod Menezes | 2021-11-30 |
| 11004536 | Cell-free biomolecular breadboards and related methods and arrangements | Zachary Sun, Richard Murray | 2021-05-11 |
| 10855184 | Load current measurement | Vinod Menezes, Manikandan RR, Rajat Chauhan, Mahesh M. Mehendale, Kaichien Tsai | 2020-12-01 |
| 10684322 | Systems and methods of testing multiple dies | Rubin Ajit Parekhji, Mahesh M. Mehendale, Vinod Menezes | 2020-06-16 |
| 10601408 | Low frequency oscillator with ultra-low short circuit current | Rajat Chauhan, Vinod Menezes, Mahesh M. Mehendale | 2020-03-24 |
| 10447142 | Load current measurement | Vinod Menezes, Manikandan RR, Rajat Chauhan, Mahesh M. Mehendale, Kaichien Tsai | 2019-10-15 |
| 10432192 | Power-on reset circuit | Divya Kaur, Rajat Chauhan | 2019-10-01 |
| 10180454 | Systems and methods of testing multiple dies | Rubin Ajit Parekhji, Mahesh M. Mehendale, Vinod Menezes | 2019-01-15 |
| 9812960 | Methods and apparatus for a low standby current DC-DC power controller with improved transient response | Keith E. Kunz, Rajat Chauhan, Per Torstein Røine, Danielle Griffith | 2017-11-07 |
| 9692416 | Buffers for driving circuits in a stand by mode | — | 2017-06-27 |
| 9496024 | Automatic latch-up prevention in SRAM | Srinivasa Raghavan Sridhara, Sanjeev Kumar Suman, Premkumar Seetharaman, Keshav Bhaktavatson Chintamani, Atul Ramakant Lele +5 more | 2016-11-15 |
| 9287858 | Low leakage shadow latch-based multi-threshold CMOS sequential circuit | — | 2016-03-15 |
| 9276566 | Dual edge-triggered retention flip-flop | — | 2016-03-01 |
| 6853574 | Reducing leakage current in circuits implemented using CMOS transistors | — | 2005-02-08 |
| 6771118 | System and method for reducing a leakage current associated with an integrated circuit | Clive Bittlestone | 2004-08-03 |