Issued Patents All Time
Showing 101–106 of 106 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8607000 | Efficient cache allocation by optimizing size and order of allocate commands based on bytes required by CPU | Roger Kyle Castille, Joseph Zbiciak, Dheera Balasubramanian | 2013-12-10 |
| 8582384 | Process variability tolerant programmable memory controller for a pipelined memory system | Ramakrishnan Venkatasubramanian, Raguram Damodaran | 2013-11-12 |
| 8560896 | Priority based exception mechanism for multi-level cache controller | Joseph Zbiciak, Raguram Damodaran, Dheera Balasubramanian | 2013-10-15 |
| 8488405 | Process variability tolerant programmable memory controller for a pipelined memory system | Ramakrishnan Venkatasubramanian, Raguram Damodaran | 2013-07-16 |
| 8201004 | Entry/exit control to/from a low power state in a complex multi level memory system | Timothy David Anderson, Lewis Nardini, Jose Luis Flores, Raguram Damodaran, Joseph Zbiciak +1 more | 2012-06-12 |
| 7240277 | Memory error detection reporting | Timothy David Anderson, David Quintin Bell, Peter Richard Dent, Raguram Damodaran | 2007-07-03 |