Issued Patents All Time
Showing 1–25 of 51 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12396256 | Semiconductor device including transistors sharing gates with structures having reduced parasitic circuit | Po-Lin Peng, Jam-Wem Lee | 2025-08-19 |
| 12349470 | Semiconductor device having multiple electrostatic discharge (ESD) paths | Jam-Wem Lee | 2025-07-01 |
| 11908859 | Semiconductor device including transistors sharing gates with structures having reduced parasitic circuit | Po-Lin Peng, Jam-Wem Lee | 2024-02-20 |
| 11855088 | Semiconductor device including transistors sharing gates with structures having reduced parasitic circuit | Po-Lin Peng, Jam-Wem Lee | 2023-12-26 |
| 11848286 | Semiconductor devices having an electro-static discharge protection structure | — | 2023-12-19 |
| 11775726 | Integrated circuit having latch-up immunity | Ming-Fang Lai, Guan-Yu Chen | 2023-10-03 |
| 11688701 | Semiconductor devices having an electro-static discharge protection structure | — | 2023-06-27 |
| 11688702 | Semiconductor devices having an electro-static discharge protection structure | — | 2023-06-27 |
| 11416666 | Integrated circuit and method for forming the same | Ming-Fang Lai, Guan-Yu Chen | 2022-08-16 |
| 11282830 | High voltage ESD protection apparatus | Jam-Wem Lee | 2022-03-22 |
| 11222893 | Semiconductor device including transistors sharing gates with structures having reduced parasitic circuit | Po-Lin Peng, Jam-Wem Lee | 2022-01-11 |
| 11127546 | Keyboard | Tao-Kuan Chen, Tzu-Chuan Liang | 2021-09-21 |
| 10930640 | Intelligent diode structures | Jam-Wem Lee, Li-Wei Chu, Po-Lin Peng | 2021-02-23 |
| 10867987 | Integrated circuit device having ESD protection | Po-Lin Peng, Li-Wei Chu, Jam-Wem Lee | 2020-12-15 |
| 10734330 | Semiconductor devices having an electro-static discharge protection structure | — | 2020-08-04 |
| 10643988 | Intelligent diode structures | Jam-Wem Lee, Li-Wei Chu, Po-Lin Peng | 2020-05-05 |
| 10411005 | Intelligent diode structures | Jam-Wem Lee, Li-Wei Chu, Po-Lin Peng | 2019-09-10 |
| 10396021 | Fabrication method of layer structure for mounting semiconductor device | Fang-Lin Tsai, Cheng-Jen Liu, Yi-Min Fu, Hung-Chi Chen | 2019-08-27 |
| 10366992 | Semiconductor device including transistors sharing gates | Po-Lin Peng, Jam-Wem Lee | 2019-07-30 |
| 10236261 | Electronic package and method for fabricating the same | Fang-Lin Tsai, Lung-Yuan Wang | 2019-03-19 |
| 10163891 | High voltage ESD protection apparatus | Jam-Wem Lee | 2018-12-25 |
| 9978739 | Semiconductor arrangement facilitating enhanced thermo-conduction | Ming-Hsiang Song, Jam-Wem Lee, Wun-Jie Lin | 2018-05-22 |
| 9972564 | Layer structure for mounting semiconductor device and fabrication method thereof | Fang-Lin Tsai, Cheng-Jen Liu, Yi-Min Fu, Hung-Chi Chen | 2018-05-15 |
| 9887275 | Method of reducing the heights of source-drain sidewall spacers of FinFETs through etching | Jam-Wem Lee, Tsung-Che Tsai | 2018-02-06 |
| 9754927 | Method for fabricating multi-chip stack structure | Chung-Lun Liu, Jung-Pin Huang, Chin-Huang Chang | 2017-09-05 |