Issued Patents All Time
Showing 201–225 of 303 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9412868 | Semiconductor device and fabrication method thereof | Yen-Ru Lee, Ming-Hua Yu, Chii-Horng Li, Pang-Yen Tsai, Lilly Su +2 more | 2016-08-09 |
| 9401426 | Semiconductor device and fabrication method thereof | Lilly Su, Pang-Yen Tsai, Chii-Horng Li, Yen-Ru Lee, Ming-Hua Yu | 2016-07-26 |
| 9362360 | Modulating germanium percentage in MOS devices | Tsz-Mei Kwok, Kun-Mu Li, Hsueh-Chang Sung, Chii-Horng Li | 2016-06-07 |
| 9337337 | MOS device having source and drain regions with embedded germanium-containing diffusion barrier | Tsz-Mei Kwok, Kun-Mu Li, Hsueh-Chang Sung, Chii-Horng Li | 2016-05-10 |
| 9337059 | Apparatus and methods for annealing wafers | Yi-Chao Wang, Yu-Chang Lin, Li-Ting Wang, Tai-Chun Huang, Pei-Ren Jeng | 2016-05-10 |
| 9318447 | Semiconductor device and method of forming vertical structure | Chih-Tang Peng, Tai-Chun Huang, Teng-Chun Tsai, Cheng-Tung Lin, De-Fang Chen +4 more | 2016-04-19 |
| 9306065 | Advanced forming method and structure of local mechanical strained transistor | Chien-Hao Chen | 2016-04-05 |
| 9293581 | FinFET with bottom SiGe layer in source/drain | Ming-Hua Yu, Pei-Ren Jeng | 2016-03-22 |
| 9287398 | Transistor strain-inducing scheme | Tsz-Mei Kwok, Hsueh-Chang Sung, Kun-Mu Li, Chii-Horng Li | 2016-03-15 |
| 9287382 | Structure and method for semiconductor device | Yi-Jing Lee, Kun-Mu Li, Chii-Horng Li | 2016-03-15 |
| 9281196 | Method to reduce etch variation using ion implantation | Tsan-Chun Wang, Ziwei Fang, Chii-Horng Li, Chao-Cheng Chen, Syun-Ming Jang | 2016-03-08 |
| 9276117 | Structure and method and FinFET device | Yi-Jing Lee, Cheng-Hsien Wu, Chih-Hsin Ko, Pang-Yen Tsai | 2016-03-01 |
| 9269777 | Source/drain structures and methods of forming same | Yi-Jing Lee, Kun-Mu Li, Chii-Horng Li | 2016-02-23 |
| 9263339 | Selective etching in the formation of epitaxy regions in MOS devices | Yu-Hung Cheng, Chii-Horng Li | 2016-02-16 |
| 9245982 | Tilt implantation for forming FinFETs | Tsan-Chun Wang, Zi-Wei Fang | 2016-01-26 |
| 9236294 | Method for forming semiconductor device structure | Chia-Cheng Chou, Chung-Chi Ko, Po-Cheng Shih, Chih-Hung Sun, Kuang-Yuan Hsu +1 more | 2016-01-12 |
| 9228260 | Wafer processing chamber, heat treatment apparatus and method for processing wafers | Tsai-Fu Hsiao, Chun-Yao Wang, Tai-Chun Huang | 2016-01-05 |
| 9209175 | MOS devices having epitaxy regions with reduced facets | Hsueh-Chang Sung, Tsz-Mei Kwok, Kun-Mu Li, Chii-Horng Li | 2015-12-08 |
| 9177955 | Isolation region gap fill method | Chih-Tang Peng, Tai-Chung Huang, Hao-Ming Lien | 2015-11-03 |
| 9153538 | Semiconductor devices and methods of manufacture thereof | Chung-Chi Ko, Pei-Wen Huang, Chih-Hao Chen, Kuang-Yuan Hsu | 2015-10-06 |
| 9142650 | Tilt implantation for forming FinFETs | Tsan-Chun Wang, Zi-Wei Fang | 2015-09-22 |
| 9142402 | Uniform shallow trench isolation regions and the method of forming the same | Yu-Ling Liou, Chih-Tang Peng, Pei-Ren Jeng, Hao-Ming Lien | 2015-09-22 |
| 9099514 | Wafer holder with tapered region | Yi-Hung Lin, Li-Ting Wang | 2015-08-04 |
| 9064688 | Performing enhanced cleaning in the formation of MOS devices | Yu-Hung Cheng, Wu-Ping Huang, Chii-Horng Li | 2015-06-23 |
| 9054130 | Bottle-neck recess in a semiconductor device | Eric Peng, Chao-Cheng Chen, Ming-Hua Yu, Ying Hao Hsieh, Chii-Horng Li +2 more | 2015-06-09 |