Issued Patents All Time
Showing 51–63 of 63 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5952698 | Layout pattern for improved MOS device matching | Pin-Nan Tseng, Jyh-Kang Ting | 1999-09-14 |
| 5920111 | CMOS OP-AMP circuit using BJT as input stage | Mong-Song Liang | 1999-07-06 |
| 5870268 | Early trigger of ESD protection device by a current spike generator | Shi-Tron Lin, Du-Zen Peng | 1999-02-09 |
| 5852541 | Early trigger of ESD protection device by an oscillation circuit | Shi-Tron Lin, Hao-Luen Tien | 1998-12-22 |
| 5818085 | Body contact for a MOSFET device fabricated in an SOI layer | Ching-Hsiang Hsu, Mong-Song Liang, Steve S. Chung | 1998-10-06 |
| 5728613 | Method of using an insulator spacer to form a narrow base width lateral bipolar junction transistor | Ching-Hsiang Hsu, Steve S. Chung, Mong-Song Liang | 1998-03-17 |
| 5705839 | Gate spacer to control the base width of a lateral bipolar junction transistor using SOI technology | Ching-Hsiang Hsu, Mong-Song Liang, Steve S. Chung | 1998-01-06 |
| 5644269 | Cascode MOS current mirror with lateral bipolar junction transistor to enhance ouput signal swing | Mong-Song Liang | 1997-07-01 |
| 5614424 | Method for fabricating an accumulated-base bipolar junction transistor | Mong-Song Liang | 1997-03-25 |
| 5610087 | Method for fabricating narrow base width lateral bipolar junction transistor, on SOI layer | Ching-Hsiang Hsu, Mong-Song Liang, Steve S. Chung | 1997-03-11 |
| 5573961 | Method of making a body contact for a MOSFET device fabricated in an SOI layer | Ching-Hsiang Hsu, Mong-Song Liang, Steve S. Chung | 1996-11-12 |
| 5567631 | Method of forming gate spacer to control the base width of a lateral bipolar junction transistor using SOI technology | Ching-Hsiang Hsu, Mong-Song Liang, Steve S. Chung | 1996-10-22 |
| 5460993 | Method of making NMOS and PMOS LDD transistors utilizing thinned sidewall spacers | Shun-Liang Hsu | 1995-10-24 |