Issued Patents All Time
Showing 26–50 of 159 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11257953 | Selective growth for high-aspect ratio metal fill | Chih-Nan Wu, Chun Che Lin, Wen-Cheng Hsuku | 2022-02-22 |
| 11230784 | Electrochemical plating system and method of using | Jun-Nan Nian, Ting-Chun Wang, Ing-Ju Lee | 2022-01-25 |
| 11227886 | Mechanisms for forming image sensor device | Volume Chien, Yun-Wei Cheng, Zhe-Ju Liu, Kuo-Cheng Lee, Chi-Cherng Jeng | 2022-01-18 |
| 11177306 | Support structure for integrated circuitry | Volume Chien, Yun-Wei Cheng, I-I Cheng, Chi-Cherng Jeng, Chih-Mu Huang | 2021-11-16 |
| 11031488 | Semiconductor device structure with barrier layer and method for forming the same | Chia-Yang Wu, Ting-Chun Wang, Yung-Si Yu | 2021-06-08 |
| 11015260 | Method for controlling electrochemical deposition to avoid defects in interconnect structures | Jun-Nan Nian, Yu-Ren PENG, Yao-Hsiang Liang, Ting-Chun Wang | 2021-05-25 |
| 11011641 | Flat STI surface for gate oxide uniformity in Fin FET devices | Cheng-Ta Wu, Cheng-Wei Chen, Ting-Chun Wang | 2021-05-18 |
| 11004973 | Semiconductor device with contamination improvement | Chung-Ren Sun, Kun-Ei Chen, Chun Che Lin | 2021-05-11 |
| 10998194 | Metal gate stack having TaAlCN layer | Ting-Chun Wang, Chi-Cherng Jeng, Chi-Wen Liu | 2021-05-04 |
| 10998415 | Metal gate scheme for device and methods of forming | Chi-Wen Liu, Chih-Nan Wu, Chun Che Lin | 2021-05-04 |
| 10957695 | Asymmetric gate pitch | Wei-Barn Chen, Chi-Cherng Jeng, Ting-Huang Kuo | 2021-03-23 |
| 10957545 | Method for manufacturing semiconductor device | Jia-Ming Lin, Chun Che Lin | 2021-03-23 |
| 10886226 | Conductive contact having staircase barrier layers | Chia-Yang Wu, Ting-Chun Wang, Yung-Si Yu | 2021-01-05 |
| 10879629 | Method of electroplating metal into recessed feature and electroplating layer in recessed feature | Jun-Nan Nian, Jyun-Ru Wu, Yu-Ren PENG, Chi-Cheng Hung, Yu-Sheng Wang | 2020-12-29 |
| 10868063 | Surface treatment for BSI image sensors | Chin-Nan Wu, Chun Che Lin | 2020-12-15 |
| 10861701 | Semiconductor device and manufacturing method thereof | Jia-Ming Lin, Chun Che Lin | 2020-12-08 |
| 10854508 | Interconnection structure and manufacturing method thereof | Chung-Wen Wu, Chien-Wen Chiu, Chien-Chung Chen | 2020-12-01 |
| 10854713 | Method for forming trench structure of semiconductor device | Jia-Ming Lin, Chun Che Lin, Ying-Lang Wang, Wei-Ken Lin, Chuan-Pu Liu | 2020-12-01 |
| 10840184 | Formation of copper layer structure with self anneal strain improvement | Jun-Nan Nian, Chi-Cheng Hung, Yu-Sheng Wang, Hung-Hsu Chen | 2020-11-17 |
| 10832974 | FinFET gate structure and method for fabricating the same | Chi-Cheng Hung, Horng-Huei Tseng | 2020-11-10 |
| 10832959 | FinFET gate structure and method for fabricating the same | Ren-Hau Yu, Chi-Cherng Jeng | 2020-11-10 |
| 10818555 | Semiconductor device having planar transistor and FinFET | Wei-Barn Chen, Ting-Huang Kuo, Chi-Cherng Jeng, Kuang-Yao Lo | 2020-10-27 |
| 10818558 | Semiconductor structure having trench and manufacturing method thereof | Chen Cheng Chou, Cheng-Ta Wu | 2020-10-27 |
| 10818716 | Image sensor device and fabricating method thereof | Chih-Nan Wu, Chun Che Lin, Yu-Ku Lin | 2020-10-27 |
| 10797176 | Selective growth for high-aspect ratio metal fill | Chih-Nan Wu, Chun Che Lin, Wen-Cheng Hsuku | 2020-10-06 |