Issued Patents All Time
Showing 101–125 of 154 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11476250 | Double rule integrated circuit layouts for a dual transmission gate | Hui-Zhong Zhuang, Jiann-Tyng Tzeng, Li-Chun Tien, Pin-Dai Sue, Wei-Cheng Lin | 2022-10-18 |
| 11374005 | Semiconductor structure and method of forming the same | Te-Hsin Chiu, Wei-Cheng Lin, Jiann-Tyng Tzeng | 2022-06-28 |
| 11355487 | Layout designs of integrated circuits having backside routing tracks | Wei-An Lai, Wei-Cheng Lin, Jiann-Tyng Tzeng | 2022-06-07 |
| 11328957 | Semiconductor device and manufacturing method thereof | Wei-Cheng Lin, Jiann-Tyng Tzeng | 2022-05-10 |
| 11309247 | Semiconductor device, and associated method and system | Wei-Cheng Lin, Jiann-Tyng Tzeng | 2022-04-19 |
| 11302631 | Integrated circuit cells and related methods | Te-Hsin Chiu, Jiann-Tyng Tzeng | 2022-04-12 |
| 11296070 | Integrated circuit with backside power rail and backside interconnect | Guo-Huei Wu, Jiann-Tyng Tzeng | 2022-04-05 |
| 11297733 | Removable fan flapper design | Chun Chang, Ta-Wei Chen, Yi-Huang Chiu | 2022-04-05 |
| 11257670 | Method of manufacturing a semiconductor device, and associated semiconductor device and system | Chia-Tien Wu, Jiann-Tyng Tzeng | 2022-02-22 |
| 11232248 | Routing-resource-improving method of generating layout diagram and system for same | Jiann-Tyng Tzeng, Wei-Cheng Lin, Jay Yang | 2022-01-25 |
| 11217528 | Semiconductor structure having buried power rail disposed between two fins and method of making the same | Jiann-Tyng Tzeng, Wei-Cheng Lin | 2022-01-04 |
| 11171089 | Line space, routing and patterning methodology | Chih-Ming Lai, Jiann-Tyng Tzeng, Wei-Cheng Lin | 2021-11-09 |
| 11159164 | Integrated circuit and method of manufacturing the same | Cheng-Chi Chuang, Chih-Ming Lai, Jiann-Tyng Tzeng, Wei-Cheng Lin | 2021-10-26 |
| 11158580 | Semiconductor devices with backside power distribution network and frontside through silicon via | Kam-Tou Sio, Cheng-Chi Chuang, Chia-Tien Wu, Jiann-Tyng Tzeng, Wei-Cheng Lin | 2021-10-26 |
| 11139245 | Advanced node interconnect routing methodology | Jiann-Tyng Tzeng | 2021-10-05 |
| 11133255 | Metal patterning for internal cell routing | Chih-Liang Chen, Charles Chew-Yuen Young, Hui-Ting Yang, Jiann-Tyng Tzeng, Wei-Cheng Lin | 2021-09-28 |
| 11126775 | IC layout, method, device, and system | Guo-Huei Wu, Wei-Cheng Lin, Hui-Zhong Zhuang, Jiann-Tyng Tzeng | 2021-09-21 |
| 11100273 | Integrated circuit and method of manufacturing same | Chih-Liang Chen, Charles Chew-Yuen Young, Hui-Zhong Zhuang, Jiann-Tyng Tzeng, Shun Li Chen +1 more | 2021-08-24 |
| 11080454 | Integrated circuit, system, and method of forming the same | Chih-Ming Lai, Jiann-Tyng Tzeng | 2021-08-03 |
| 11055469 | Power structure with power pick-up cell connecting to buried power rail | Jiann-Tyng Tzeng, Wei-Cheng Lin | 2021-07-06 |
| 11048848 | Semiconductor device including region having both continuous regions, and method and system for generating layout diagram of same | Chun-Hung Liou, Jiann-Tyng Tzeng | 2021-06-29 |
| 11024579 | Dual power structure with connection pins | Chih-Ming Lai, Chun-Kuang Chen, Chih-Liang Chen, Charles Chew-Yuen Young, Jiann-Tyng Tzeng +3 more | 2021-06-01 |
| 11024580 | Random cut patterning | Wei-Cheng Lin, Chih-Ming Lai, Jiann-Tyng Tzeng | 2021-06-01 |
| 10977417 | Semiconductor structure, device, and method | Jiann-Tyng Tzeng, Wei-Cheng Lin | 2021-04-13 |
| 10977421 | System for and method of manufacturing an integrated circuit | Wei-Cheng Lin, Chih-Liang Chen, Chih-Ming Lai, Charles Chew-Yuen Young, Jiann-Tyng Tzeng +3 more | 2021-04-13 |