Issued Patents All Time
Showing 176–200 of 268 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10153035 | SRAM-based authentication circuit | Chien-Chen Lin, Wei Min Chan, Chih-Yu Lin, Yen-Huei Chen | 2018-12-11 |
| 10108549 | Method and apparatus for pre-fetching data in a system having a multi-level system memory | Zhe Wang, Christopher B. Wilkerson, Zeshan A. Chishti, Seth H. Pugsley, Alaa R. Alameldeen | 2018-10-23 |
| 10102134 | Instruction and logic for run-time evaluation of multiple prefetchers | Zeshan A. Chishti, Christopher B. Wilkerson, Seth H. Pugsley, Peng-Fei Chuang, Robert L. Scott +2 more | 2018-10-16 |
| 10083140 | DRAM data path sharing via a segmented global data bus | Wei Wu, Shigeki Tomishima | 2018-09-25 |
| 10067701 | SRAM-based authentication circuit | — | 2018-09-04 |
| 10056921 | Memory system having flexible ECC scheme and method of the same | Yu-Der Chih | 2018-08-21 |
| 10024916 | Sequential circuit with error detection | Keith Alan Bowman, James W. Tschanz, Nam Sung Kim, Janice C. Lee, Christopher B. Wilkerson +2 more | 2018-07-17 |
| 10019236 | SRAM-based true random number generator | — | 2018-07-10 |
| 9997244 | RRAM-based authentication circuit | Yu-Der Chih | 2018-06-12 |
| 9971045 | Memory with enhancement to perform radiation measurement | — | 2018-05-15 |
| 9965415 | DRAM data path sharing via a split local data bus and a segmented global data bus | Wei Wu, Shigeki Tomishima | 2018-05-08 |
| 9934082 | Apparatus and method for detecting single flip-error in a complementary resistive memory | Shigeki Tomishima, Charles Augustine, Wei Wu | 2018-04-03 |
| 9934827 | DRAM data path sharing via a split local data bus | Wei Wu, Shigeki Tomishima | 2018-04-03 |
| 9922695 | Apparatus and method for page copying within sections of a memory | Shigeki Tomishima | 2018-03-20 |
| 9858984 | Apparatuses, methods, and systems for increasing a speed of removal of data from a memory cell | Helia Naeimi, Shigeki Tomishima | 2018-01-02 |
| 9830988 | Apparatus to reduce retention failure in complementary resistive memory | Charles Augustine, Wei Wu, Shigeki Tomishima, James W. Tschanz | 2017-11-28 |
| 9747967 | Magnetic field-assisted memory operation | Helia Naeimi, Shigeki Tomishima | 2017-08-29 |
| 9703626 | Recycling error bits in floating point units | Helia Naeimi, Ralph Nathan, Daniel Sorin | 2017-07-11 |
| 9666257 | Bitcell state retention | Charles Augustine, Shigeki Tomishima, James W. Tschanz | 2017-05-30 |
| 9600183 | Apparatus, system and method for determining comparison information based on memory data | Shigeki Tomishima | 2017-03-21 |
| 9594625 | Sequential circuit with error detection | Keith Alan Bowman, James W. Tschanz, Nam Sung Kim, Janice C. Lee, Christopher B. Wilkerson +2 more | 2017-03-14 |
| 9558807 | Apparatuses and systems for increasing a speed of removal of data stored in a memory cell | Helia Naeimi, Shigeki Tomishima | 2017-01-31 |
| 9536577 | Data movement in memory devices | Ying-Chen Lin, Chia-Lin Yang | 2017-01-03 |
| 9529660 | Apparatus and method for detecting single flip-error in a complementary resistive memory | Shigeki Tomishima, Charles Augustine, Wei Wu | 2016-12-27 |
| 9520192 | Resistive memory write operation with merged reset | Helia Naeimi, Charles Augustine | 2016-12-13 |