Issued Patents All Time
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7498653 | Semiconductor structure for isolating integrated circuits of various operating voltages | Chia-Wei Liu, Jun Liu, Chi-Hsuen Chang, Tzu-Chiang Sung, Chung-I Chen | 2009-03-03 |
| 7436043 | N-well and N+ buried layer isolation by auto doping to reduce chip size | Tzu-Chiang Sung, Chih Po Huang, Jun Liu, Chi-Hsuen Chang, Chung-I Chen | 2008-10-14 |
| 7301185 | High-voltage transistor device having an interlayer dielectric etch stop layer for preventing leakage and improving breakdown voltage | Chung-I Chen, Hsin Kuan, Zhi Chen, Chi-Hsuen Chang, Jun Liu +3 more | 2007-11-27 |
| 7205630 | Method and apparatus for a semiconductor device having low and high voltage transistors | Chi-Hsuen Chang, Jun Liu, Tsung-Yi Huang, Chung-I Chen, Tzu-Chiang Sung +1 more | 2007-04-17 |
| 5783493 | Method for reducing precipitate defects using a plasma treatment post BPSG etchback | Chao-Hsin Chang, Hsien-Wen Chang | 1998-07-21 |