Issued Patents All Time
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7498653 | Semiconductor structure for isolating integrated circuits of various operating voltages | Chia-Wei Liu, Jun Liu, Chi-Hsuen Chang, Chung-I Chen, Rann-Shyan Yeh | 2009-03-03 |
| 7436043 | N-well and N+ buried layer isolation by auto doping to reduce chip size | Chih Po Huang, Rann-Shyan Yeh, Jun Liu, Chi-Hsuen Chang, Chung-I Chen | 2008-10-14 |
| 7301185 | High-voltage transistor device having an interlayer dielectric etch stop layer for preventing leakage and improving breakdown voltage | Chung-I Chen, Hsin Kuan, Zhi Chen, Rann-Shyan Yeh, Chi-Hsuen Chang +3 more | 2007-11-27 |
| 7205630 | Method and apparatus for a semiconductor device having low and high voltage transistors | Chi-Hsuen Chang, Jun Liu, Tsung-Yi Huang, Chung-I Chen, Chih Po Huang +1 more | 2007-04-17 |
| 7196392 | Semiconductor structure for isolating integrated circuits of various operation voltages | Jun Liu, Chi-Hsuen Chang, Chung-I Chen, Chih Po Huang | 2007-03-27 |