Issued Patents All Time
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7436043 | N-well and N+ buried layer isolation by auto doping to reduce chip size | Tzu-Chiang Sung, Rann-Shyan Yeh, Jun Liu, Chi-Hsuen Chang, Chung-I Chen | 2008-10-14 |
| 7205630 | Method and apparatus for a semiconductor device having low and high voltage transistors | Chi-Hsuen Chang, Jun Liu, Tsung-Yi Huang, Chung-I Chen, Tzu-Chiang Sung +1 more | 2007-04-17 |
| 7196392 | Semiconductor structure for isolating integrated circuits of various operation voltages | Jun Liu, Chi-Hsuen Chang, Tzu-Chiang Sung, Chung-I Chen | 2007-03-27 |