Issued Patents All Time
Showing 26–50 of 61 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6762439 | Diode for power protection | Shui-Hung Chen, Jian-Hsing Lee, Ta-Lee Yu | 2004-07-13 |
| 6747857 | Clamping circuit for stacked NMOS ESD protection | Jian-Hsing Lee, Hung-Der Su | 2004-06-08 |
| 6740934 | ESD protection scheme for outputs with resistor loading | Jian-Hsing Lee, Shui-Hun Chen | 2004-05-25 |
| 6614693 | Combination erase waveform to reduce oxide trapping centers generation rate of flash EEPROM | Jian-Hsing Lee, Kuo-Reay Peng, Shui-Hung Chen | 2003-09-02 |
| 6614078 | Highly latchup-immune CMOS I/O structures | Jian-Hsing Lee, Shui-Hung Chen, Ping Lung Liao | 2003-09-02 |
| 6582997 | ESD protection scheme for outputs with resistor loading | Jian-Hsing Lee, Shui-Hun Chen | 2003-06-24 |
| 6541824 | Modified source side inserted anti-type diffusion ESD protection device | Jian-Hsing Lee, Shui-Hung Chen, Yi-Hsun Wu | 2003-04-01 |
| 6459127 | Uniform current distribution SCR device for high voltage ESD protection | Jian-Hsing Lee, Kuo-Chio Liu, Bing-Lung Liao | 2002-10-01 |
| 6441438 | ESD protect device structure | Jian-Hsing Lee, Huey-Liang Hwang | 2002-08-27 |
| 6437408 | Plasma damage protection cell using floating N/P/N and P/N/P structure | Shui Shen, Jian-Hsing Lee, Chrong-Jung Lin | 2002-08-20 |
| 6426855 | ESD protection circuit for different power supplies | Jian-Hsing Lee, Yi-Hsun Wu, Jing-Meng Liu | 2002-07-30 |
| 6420221 | Method of manufacturing a highly latchup-immune CMOS I/O structure | Jian-Hsing Lee, Shui-Hung Chen, Ping Lung Liao | 2002-07-16 |
| 6362035 | Channel stop ion implantation method for CMOS integrated circuits | Shui-Hung Chen, Jian-Hsing Lee, Hsien-Chin Lin | 2002-03-26 |
| 6358781 | Uniform current distribution SCR device for high voltage ESD protection | Jian-Hsing Lee, Kuo-Chio Liu, Bing-Lung Liao | 2002-03-19 |
| 6323523 | N-type structure for n-type pull-up and down I/O protection circuit | Jian-Hsing Lee, Yi-Hsun Wu, Shui-Hung Chen | 2001-11-27 |
| 6306695 | Modified source side inserted anti-type diffusion ESD protection device | Jian-Hsing Lee, Shui-Hung Chen, Yi-Hsun Wu | 2001-10-23 |
| 6277723 | Plasma damage protection cell using floating N/P/N and P/N/P structure | Shui-Hung Chen, Jian-Hsing Lee, Chrong-Jung Lin | 2001-08-21 |
| 6271999 | ESD protection circuit for different power supplies | Jian-Hsing Lee, Yi-Hsun Wu, Jing-Meng Liu | 2001-08-07 |
| 6268992 | Displacement current trigger SCR | Jian-Hsing Lee, Yi-Hsun Wu, Jing-Meng Liu | 2001-07-31 |
| 6258672 | Method of fabricating an ESD protection device | Jian-Hsing Lee, Huey-Liang Hwang | 2001-07-10 |
| 6249414 | Displacement current trigger SCR | Jian-Hsing Lee, Yi-Hsun Wu, Jing-Meng Liu | 2001-06-19 |
| 6242314 | Method for fabricating a on-chip temperature controller by co-implant polysilicon resistor | Shui-Hung Chen, Chrong-Jung Lin | 2001-06-05 |
| 6235600 | Method for improving hot carrier lifetime via a nitrogen implantation procedure performed before or after a teos liner deposition | Mu-Chi Chiang, Hsien-Chin Lin | 2001-05-22 |
| 6232160 | Method of delta-channel in deep sub-micron process | Shui-Hung Chen, Jian-Hsing Lee | 2001-05-15 |
| 6214670 | Method for manufacturing short-channel, metal-gate CMOS devices with superior hot carrier performance | Shui-Hung Chen, Jian-Hsing Lee | 2001-04-10 |