Issued Patents All Time
Showing 101–121 of 121 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9536790 | Semiconductor device with self-heat reducing layers | Amit Kundu, Chung-Hui Chen | 2017-01-03 |
| 9536876 | Temperature detector and controlling heat | Yung-Chow Peng, Amit Kundu, Szu-Lin Liu | 2017-01-03 |
| 9379112 | Integrated circuit with transistor array and layout method thereof | Ching-Ho Chang, Yung-Chow Peng | 2016-06-28 |
| 9378314 | Analytical model for predicting current mismatch in metal oxide semiconductor arrays | Amit Kundu, Yung-Chow Peng, Shih-Cheng Yang, Chung-Kai Lin | 2016-06-28 |
| 9354124 | Temperature/voltage detection circuit | Szu-Lin Liu, Chung-Hui Chen | 2016-05-31 |
| 9343552 | FinFET with embedded MOS varactor and method of making same | Wan-Te Chen, Chung-Hui Chen, Po-Zeng Kang | 2016-05-17 |
| 9305864 | Through silicon via (TSV) isolation structures for noise reduction in 3D integrated circuit | Chia-Lin Yu, Chung-Hui Chen, Der-Chyang Yeh, Yung-Chow Peng | 2016-04-05 |
| 9219038 | Shielding for through-silicon-via | Chung-Peng Hsieh | 2015-12-22 |
| 9166067 | Device layout for reference and sensor circuits | Chung-Hui Chen, Sun-Jay Chang, Chia-Hsin Hu | 2015-10-20 |
| 9158883 | System for designing a semiconductor device, device made, and method of using the system | Yung-Chow Peng, Wen-Shen Chou | 2015-10-13 |
| 9093494 | Guard structure for semiconductor structure and method of forming guard layout pattern for semiconductor layout pattern | Jen-Hao Yeh, Fu-Chih Yang, Chung-Hui Chen | 2015-07-28 |
| 9064725 | FinFET with embedded MOS varactor and method of making same | Wan-Te Chen, Chung-Hui Chen, Po-Zeng Kang | 2015-06-23 |
| 9006863 | Diode string voltage adapter | Chung-Peng Hsieh | 2015-04-14 |
| 8946038 | Diode structures using fin field effect transistor processing and method of forming the same | Chia-Hsin Hu, Sun-Jay Chang, Chung-Hui Chen | 2015-02-03 |
| 8916955 | Nearly buffer zone free layout methodology | Yung-Chow Peng, Szu-Lin Liu, Po-Zeng Kang | 2014-12-23 |
| 8878369 | Low power/high speed TSV interface design | Chung-Hui Chen, Shuo-Mao Chen, Der-Chyang Yeh | 2014-11-04 |
| 8832619 | Analytical model for predicting current mismatch in metal oxide semiconductor arrays | Amit Kundu, Yung-Chow Peng, Shih-Cheng Yang, Chung-Kai Lin | 2014-09-09 |
| 8736355 | Device layout for reference and sensor circuits | Chung-Hui Chen, Sun-Jay Chang, Chia-Hsin Hu | 2014-05-27 |
| 8610241 | Homo-junction diode structures using fin field effect transistor processing | Chia-Hsin Hu, Sun-Jay Chang, Chung-Hui Chen | 2013-12-17 |
| 8546953 | Through silicon via (TSV) isolation structures for noise reduction in 3D integrated circuit | Chia-Lin Yu, Chung-Hui Chen, Der-Chyang Yeh, Yung-Chow Peng | 2013-10-01 |
| 8525559 | Non-overlap circuit | — | 2013-09-03 |