Issued Patents All Time
Showing 26–50 of 100 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6819593 | Architecture to suppress bit-line leakage | Der-Shin Shyu, Li-Wen Chang, Han-Ping Chen, Chen-Ming Huang, Ya-Chen Kao | 2004-11-16 |
| 6753569 | Method to fabricate a non-smiling effect structure in split-gate flash with self-aligned isolation | Yai-Fen Lin, Chang-Song Lin, Chia-Ta Hsieh, Juang-Ke Yeh | 2004-06-22 |
| 6674118 | PIP capacitor for split-gate flash process | Chung-Ker Yeh, Di-Son Kuo, Chia-Ta Hsieh, Yai-Fen Lin | 2004-01-06 |
| 6649489 | Poly etching solution to improve silicon trench for low STI profile | Li-Wen Chang, Der-Shin Shyu, Han-Ping Chen, Chen-Ming Huang, Ya-Chen Kao | 2003-11-18 |
| 6635922 | Method to fabricate poly tip in split gate flash | Chia-Ta Hsieh, Yai-Fen Lin, Jack Y. Yeh, Di-Son Kuo | 2003-10-21 |
| 6573555 | Source side injection programming and tip erasing P-channel split gate flash memory cell | Yai-Fen Lin, Di-Son Kuo, Chia-Ta Hsieh | 2003-06-03 |
| 6569736 | Method for fabricating square polysilicon spacers for a split gate flash memory device by multi-step polysilicon etch | Cheng-Yuan Hsu, Su-Chang Chen, Han-Ping Chen, Chia-Ta Hsieh, Der-Shin Shyu | 2003-05-27 |
| 6559501 | Method for forming split-gate flash cell for salicide and self-align contact | Di-Son Kuo, Chia-Ta Hsieh | 2003-05-06 |
| 6538277 | Split-gate flash cell | Di-Son Kuo, Chuang-Ke Yeh, Chia-Ta Hsieh, Yai-Fen Lin, Wen-Ting Chu | 2003-03-25 |
| 6538276 | Split gate flash memory device with shrunken cell and source line array dimensions | Chia-Ta Hsieh, Yai-Fen Liu, Di-Son Kuo | 2003-03-25 |
| 6534821 | Structure with protruding source in split-gate flash | Chia-Ta Hsieh, Yai-Fen Lin, Chuang-Ke Yeh, Wen-Ting Chu, Di-Son Kuo | 2003-03-18 |
| 6504206 | Split gate flash cell for multiple storage | Di-Son Kuo, Chia-Ta Hsieh, Yai-Fen Lin | 2003-01-07 |
| 6482700 | Split gate field effect transistor (FET) device with enhanced electrode registration and method for fabrication thereof | Han-Ping Chen | 2002-11-19 |
| 6483159 | Undoped polysilicon as the floating-gate of a split-gate flash cell | Yai-Fen Lin, Chia-Ta Hsieh, Juang-Ke Yeh, Di-Son Kuo | 2002-11-19 |
| 6479859 | Split gate flash memory with multiple self-alignments | Chia-Ta Hsieh, Tai-Fen Lin, Wen-Ting Chu, Chuang-Ke Yeh, Di-Son Kuo | 2002-11-12 |
| 6465841 | Split gate flash memory device having nitride spacer to prevent inter-poly oxide damage | Chia-Ta Hsieh, Yai-Fen Lin, Jack Y. Yeh, Di-Son Kuo | 2002-10-15 |
| 6441429 | Split-gate flash memory device having floating gate electrode with sharp peak | Chia-Ta Hsieh, Yai-Fen Lin, Di-Son Kuo | 2002-08-27 |
| 6417049 | Split gate flash cell for multiple storage | Di-Son Kuo, Chia-Ta Hsieh, Yai-Fen Lin | 2002-07-09 |
| 6410957 | Method of forming poly tip to improve erasing and programming speed in split gate flash | Chia-Ta Hsieh, Di-Son Kuo, Yai-Fen Lin | 2002-06-25 |
| 6396112 | Method of fabricating buried source to shrink chip size in memory array | Chia-Ta Hsieh, Jenn Tsao, Di-Son Kuo, Yai-Fen Lin | 2002-05-28 |
| 6385089 | Split-gate flash cell for virtual ground architecture | Din-Son Kuo, Chia-Ta Hsieh, Yai-Fen Lin | 2002-05-07 |
| 6380583 | Method to increase coupling ratio of source to floating gate in split-gate flash | Chia-Ta Hsieh, Yai-Fen Lin, Di-Son Kuo, Jack Y. Yeh | 2002-04-30 |
| 6380035 | Poly tip formation and self-align source process for split-gate flash cell | Di-Son Kuo, Chia-Ta Hsieh, Yai-Fen Lin | 2002-04-30 |
| 6358796 | Method to fabricate a non-smiling effect structure in split-gate flash with self-aligned isolation | Yai-Fen Lin, Chang-Song Lin, Chia-Ta Hsieh, Juang-Ke Yeh | 2002-03-19 |
| 6355527 | Method to increase coupling ratio of source to floating gate in split-gate flash | Yai-Fen Lin, Chia-Ta Hsieh, Jack Y. Yeh, Di-Son Kuo | 2002-03-12 |