Issued Patents All Time
Showing 1–25 of 67 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7417278 | Method to increase coupling ratio of source to floating gate in split-gate flash | Chia-Ta Hsieh, Di-Son Kuo, Hung-Cheng Sung, Jack Y. Yeh | 2008-08-26 |
| 7001809 | Method to increase coupling ratio of source to floating gate in split-gate flash | Chia-Ta Hsieh, Di-Son Kuo, Hung-Cheng Sung, Jack Y. Yeh | 2006-02-21 |
| 6753569 | Method to fabricate a non-smiling effect structure in split-gate flash with self-aligned isolation | Chang-Song Lin, Chia-Ta Hsieh, Hung-Cheng Sung, Juang-Ke Yeh | 2004-06-22 |
| 6724036 | Stacked-gate flash memory cell with folding gate and increased coupling ratio | Chia-Ta Hsieh, Di-Son Kuo, Chrong-Jung Lin, Jong Chen, Hung-Der Su | 2004-04-20 |
| 6674118 | PIP capacitor for split-gate flash process | Chung-Ker Yeh, Hung-Cheng Sung, Di-Son Kuo, Chia-Ta Hsieh | 2004-01-06 |
| 6667509 | Method of forming sharp beak of poly by oxygen/fluorine implant to improve erase speed for split-gate flash | Chia-Ta Hsieh, Hong-Cheng Sung, Di-Son Kuo | 2003-12-23 |
| 6635922 | Method to fabricate poly tip in split gate flash | Chia-Ta Hsieh, Hung-Cheng Sung, Jack Y. Yeh, Di-Son Kuo | 2003-10-21 |
| 6573555 | Source side injection programming and tip erasing P-channel split gate flash memory cell | Di-Son Kuo, Hung-Cheng Sung, Chia-Ta Hsieh | 2003-06-03 |
| 6538277 | Split-gate flash cell | Hung-Cheng Sung, Di-Son Kuo, Chuang-Ke Yeh, Chia-Ta Hsieh, Wen-Ting Chu | 2003-03-25 |
| 6534821 | Structure with protruding source in split-gate flash | Chia-Ta Hsieh, Hung-Cheng Sung, Chuang-Ke Yeh, Wen-Ting Chu, Di-Son Kuo | 2003-03-18 |
| 6509603 | P-channel EEPROM and flash EEPROM devices | Shiou-Hann Liaw, Di-Son Kuo, Juang-Ke Yeh | 2003-01-21 |
| 6504206 | Split gate flash cell for multiple storage | Hung-Cheng Sung, Di-Son Kuo, Chia-Ta Hsieh | 2003-01-07 |
| 6483159 | Undoped polysilicon as the floating-gate of a split-gate flash cell | Chia-Ta Hsieh, Hung-Cheng Sung, Juang-Ke Yeh, Di-Son Kuo | 2002-11-19 |
| 6465841 | Split gate flash memory device having nitride spacer to prevent inter-poly oxide damage | Chia-Ta Hsieh, Hung-Cheng Sung, Jack Y. Yeh, Di-Son Kuo | 2002-10-15 |
| 6455887 | Nonvolatile devices with P-channel EEPROM device as injector | Shiou-Hann Liaw, Di-Son Kuo, Jian-Hsing Lee | 2002-09-24 |
| 6441429 | Split-gate flash memory device having floating gate electrode with sharp peak | Chia-Ta Hsieh, Hung-Cheng Sung, Di-Son Kuo | 2002-08-27 |
| 6417049 | Split gate flash cell for multiple storage | Hung-Cheng Sung, Di-Son Kuo, Chia-Ta Hsieh | 2002-07-09 |
| 6410957 | Method of forming poly tip to improve erasing and programming speed in split gate flash | Chia-Ta Hsieh, Di-Son Kuo, Hung-Cheng Sung | 2002-06-25 |
| 6396112 | Method of fabricating buried source to shrink chip size in memory array | Chia-Ta Hsieh, Jenn Tsao, Di-Son Kuo, Hung-Cheng Sung | 2002-05-28 |
| 6385089 | Split-gate flash cell for virtual ground architecture | Hung-Cheng Sung, Din-Son Kuo, Chia-Ta Hsieh | 2002-05-07 |
| 6380583 | Method to increase coupling ratio of source to floating gate in split-gate flash | Chia-Ta Hsieh, Di-Son Kuo, Hung-Cheng Sung, Jack Y. Yeh | 2002-04-30 |
| 6380035 | Poly tip formation and self-align source process for split-gate flash cell | Hung-Cheng Sung, Di-Son Kuo, Chia-Ta Hsieh | 2002-04-30 |
| 6358796 | Method to fabricate a non-smiling effect structure in split-gate flash with self-aligned isolation | Chang-Song Lin, Chia-Ta Hsieh, Hung-Cheng Sung, Juang-Ke Yeh | 2002-03-19 |
| 6355527 | Method to increase coupling ratio of source to floating gate in split-gate flash | Chia-Ta Hsieh, Hung-Cheng Sung, Jack Y. Yeh, Di-Son Kuo | 2002-03-12 |
| 6344997 | Split-gate flash cell for virtual ground architecture | Hung-Cheng Sung, Din-Son Kuo, Chia-Ta Hsieh | 2002-02-05 |