Issued Patents All Time
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12360151 | Method of testing, wafer, and testing station | Mohamad Dernaika, Ludovic Caro, Alison Perrott, Frank Peters | 2025-07-15 |
| 12233639 | Source wafer, method, and optoelectronic devices | Mohamad Dernaika, Frank Peters, Guomin Yu | 2025-02-25 |
| 11953728 | Method for III-v/silicon hybrid integration | Guomin Yu, Mohamad Dernaika, Ludovic Caro, Aaron John Zilkie | 2024-04-09 |
| 11378762 | Method for III-V/silicon hybrid integration | Guomin Yu, Mohamad Dernaika, Ludovic Caro, Aaron John Zilkie | 2022-07-05 |
| 7915995 | Compensation of field effect on polycrystalline resistors | Ammisetti Prasad, John L. Melanson | 2011-03-29 |
| 7616089 | Compensation of field effect on polycrystalline resistors | Ammisetti Prasad, John L. Melanson | 2009-11-10 |
| 6627475 | Buried photodiode structure for CMOS image sensor | Ching-Wen Cho, Chih-Heng Shen | 2003-09-30 |
| 6534356 | Method of reducing dark current for an image sensor device via use of a polysilicon pad | An-Min Chiang, Wei-Kun Yeh, Chi-Hsiang Lee | 2003-03-18 |
| 6531725 | Pinned photodiode structure in a 3T active pixel sensor | Chi-Hsiang Lee, An-Ming Chiang, Wei-Kun Yeh | 2003-03-11 |
| 6514785 | CMOS image sensor n-type pin-diode structure | An-Min Chiang, Chi-Hsiang Lee, Wei-Kun Yeh | 2003-02-04 |
| 6372537 | Pinned photodiode structure in a 3T active pixel sensor | Chi-Hsiang Lee, An-Ming Chiang, Wei-Kun Yeh | 2002-04-16 |
| 6306678 | Process for fabricating a high quality CMOS image sensor | An-Min Chiang, Chi-Hsiang Lee, Wei-Kun Yeh | 2001-10-23 |
| 6147372 | Layout of an image sensor for increasing photon induced current | Chih-Heng Shen, Wen-Cheng Chang | 2000-11-14 |
| 6071826 | Method of manufacturing CMOS image sensor leakage free with double layer spacer | Ching-Wen Cho, Sen-Fu Chen, Chih-Heng Shen, Wen-Cheng Chien, Chang-Jen Wu +2 more | 2000-06-06 |