Issued Patents All Time
Showing 26–49 of 49 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10535560 | Interconnection structure of semiconductor device | Wei-Chen Chu, Tai-I Yang, Chia-Tien Wu | 2020-01-14 |
| 10534273 | Multi-metal fill with self-aligned patterning and dielectric with voids | Tai-I Yang, Wei-Chen Chu, Shau-Lin Shue, Li-Lin Su, Yung-Hsu Wu | 2020-01-14 |
| 10529617 | Metal routing with flexible space formed using self-aligned spacer patterning | Chia-Tien Wu, Wei-Chen Chu | 2020-01-07 |
| 10522469 | Split rail structures located in adjacent metal layers | Chia-Tien Wu, Wei-Chen Chu | 2019-12-31 |
| 10522353 | Semiconductor epitaxy bordering isolation structure | Wen-Chin Chen, Cheng-Yi Wu, Yu-Hung Cheng, Ren-Hua Guo, Chin-Szu Lee | 2019-12-31 |
| 10490500 | Metal line structure and method | Hsiang-Lun Kao, Tai-I Yang, Jian-Hua Chen, Yu-Chieh Liao, Yung-Chih Wang +1 more | 2019-11-26 |
| 10290580 | Hybrid copper structure for advance interconnect usage | Tai-I Yang, Cheng-Chi Chuang, Tien-Lu Lin | 2019-05-14 |
| 10276396 | Method for forming semiconductor device with damascene structure | Chia-Tien Wu, Wei-Chen Chu | 2019-04-30 |
| 10269715 | Split rail structures located in adjacent metal layers | Chia-Tien Wu, Wei-Chen Chu | 2019-04-23 |
| 10163690 | 2-D interconnections for integrated circuits | Chia-Tien Wu, Tai-I Yang, Wei-Chen Chu | 2018-12-25 |
| 10147609 | Semiconductor epitaxy bordering isolation structure | Wen-Chin Chen, Cheng-Yi Wu, Yu-Hung Cheng, Ren-Hua Guo, Chin-Szu Lee | 2018-12-04 |
| 10020261 | Split rail structures located in adjacent metal layers | Chia-Tien Wu, Wei-Chen Chu | 2018-07-10 |
| 9837354 | Hybrid copper structure for advance interconnect usage | Tai-I Yang, Cheng-Chi Chuang, Tien-Lu Lin | 2017-12-05 |
| 9607881 | Insulator void aspect ratio tuning by selective deposition | Yu-Chieh Liao, Tien-Lu Lin | 2017-03-28 |
| 9595471 | Conductive element structure and method | Tai-I Yang, Chia-Tien Wu, Hsiang-Huan Lee, Tien-Lu Lin | 2017-03-14 |
| 9583434 | Metal line structure and method | Hsiang-Lun Kao, Tai-I Yang, Jian-Hua Chen, Yu-Chieh Liao, Yung-Chih Wang +1 more | 2017-02-28 |
| 9425089 | Conductive element structure and method | Tai-I Yang, Chia-Tien Wu, Hsiang-Huan Lee, Tien-Lu Lin | 2016-08-23 |
| 9219494 | Dual mode analog to digital converter | Ting Wang | 2015-12-22 |
| 8779959 | Method of dynamic element matching and an apparatus thereof | Wen-Hsien Chuang, Jen-Wei Tsai, Ting Wang | 2014-07-15 |
| 8770679 | Container data center | — | 2014-07-08 |
| 7307838 | Hard disc drive carrier | Chao-Jung Chen | 2007-12-11 |
| 6819556 | Server system and vibration-free extractable hard disc drive assembly thereof | Chao-Jung Chen | 2004-11-16 |
| 6001681 | Method to reduce the depth of a buried contact trench by using a thin split polysilicon thickness | Jing-Chuan Hsieh | 1999-12-14 |
| 5824457 | Use of WEE (wafer edge exposure) to prevent polyimide contamination | Chien-Ming Chung, Liang Szuma, Ding-Shan Wang | 1998-10-20 |