Issued Patents All Time
Showing 251–275 of 298 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10559558 | Pin modification for standard cells | Fong-Yuan Chang, Sheng-Hsiung Chen, Ting-Wei Chiang, Jung-Chan Yang, Lee-Chung Lu +2 more | 2020-02-11 |
| 10522527 | System and method of processing cutting layout and example switching circuit | Tung-Heng Hsieh, Hui-Zhong Zhuang, Sheng-Hsiung Wang, Ting-Wei Chiang, Li-Chun Tien | 2019-12-31 |
| 10522642 | Semiconductor device with air-spacer | Wei-Yang Lee, Feng-Cheng Yang, Yen-Ming Chen | 2019-12-31 |
| 10515948 | Semiconductor device including vertical routing structure and method for manufacturing the same | Wei-Chih Wen, Han-Ting Tsai | 2019-12-24 |
| 10504837 | Semiconductor device including a conductive feature over an active region | Tung-Heng Hsieh, Hui-Zhong Zhuang, Ting-Wei Chiang, Sheng-Hsiung Wang, Li-Chun Tien | 2019-12-10 |
| 10325900 | Integrated circuit and method of fabricating the same | Ting-Wei Chiang, Hui-Zhong Zhuang, Pin-Dai Sue, Li-Chun Tien | 2019-06-18 |
| 10276794 | Memory device and fabrication method thereof | Tai-Yen Peng, Hui-Hsien Wei, Wei-Chih Wen, Pin-Ren Dai, Chien-Min Lee +2 more | 2019-04-30 |
| 10269784 | Integrated circuit layout and method of configuring the same | Ting-Wei Chiang, Hui-Zhong Zhuang, Pin-Dai Sue, Li-Chun Tien | 2019-04-23 |
| 10170378 | Gate all-around semiconductor device and manufacturing method thereof | Gerben Doornbos, Mark van Dal | 2019-01-01 |
| 10163880 | Integrated circuit and method of fabricating the same | Ting-Wei Chiang, Hui-Zhong Zhuang, Pin-Dai Sue, Li-Chun Tien | 2018-12-25 |
| 10141256 | Semiconductor device and layout design thereof | Ting-Wei Chiang, Hui-Zhong Zhuang, Li-Chun Tien, Pin-Dai Sue | 2018-11-27 |
| 9991158 | Semiconductor device, layout of semiconductor device, and method of manufacturing semiconductor device | Tung-Heng Hsieh, Hui-Zhong Zhuang, Sheng-Hsiung Wang, Ting-Wei Chiang, Li-Chun Tien +1 more | 2018-06-05 |
| 9899263 | Method of forming layout design | Tung-Heng Hsieh, Sheng-Hsiung Wang, Hui-Zhong Zhuang, Min-Hsiung Chiang, Ting-Wei Chiang +1 more | 2018-02-20 |
| 9846757 | Cell grid architecture for FinFET technology | Hui-Zhong Zhuang, Ting-Wei Chiang, Li-Chun Tien | 2017-12-19 |
| 9806071 | Integrated circuit with elongated coupling | Tung-Heng Hsieh, Hui-Zhong Zhuang, Ting-Wei Chiang, Sheng-Hsiung Wang, Li-Chun Tien | 2017-10-31 |
| 9431381 | System and method of processing cutting layout and example switching circuit | Tung-Heng Hsieh, Hui-Zhong Zhuang, Sheng-Hsiung Wang, Ting-Wei Chiang, Li-Chun Tien | 2016-08-30 |
| 9425141 | Integrated circuit with elongated coupling | Tung-Heng Hsieh, Hui-Zhong Zhuang, Ting-Wei Chiang, Sheng-Hsiung Wang, Li-Chun Tien | 2016-08-23 |
| 9412700 | Semiconductor device and method of manufacturing semiconductor device | Tung-Heng Hsieh, Hui-Zhong Zhuang, Ting-Wei Chiang, Sheng-Hsiung Wang, Li-Chun Tien | 2016-08-09 |
| 9336348 | Method of forming layout design | Tung-Heng Hsieh, Sheng-Hsiung Wang, Hui-Zhong Zhuang, Min-Hsiung Chiang, Ting-Wei Chiang +1 more | 2016-05-10 |
| 9299734 | Methods of stress engineering to reduce dark current of CMOS image sensors | Ru-Shang Hsiao, Nai-Wen Cheng, Chien-Hsien Tseng, Shou-Gwo Wuu | 2016-03-29 |
| 9214356 | Mechanisms for forming patterns | Ru-Gun Liu, Ming-Feng Shieh, Shih-Ming Chang, Tsai-Sheng Gau | 2015-12-15 |
| 9070630 | Mechanisms for forming patterns | Ru-Gun Liu, Ming-Feng Shieh, Tsai-Sheng Gau, Shih-Ming Chang | 2015-06-30 |
| 8778717 | Local oxidation of silicon processes with reduced lateral oxidation | Ru-Shang Hsiao, Nai-Wen Cheng, Yin-Kai Liao, Wei Chuang Wu | 2014-07-15 |
| 8546860 | Stress engineering to reduce dark current of CMOS image sensors | Ru-Shang Hsiao, Nai-Wen Cheng, Chien-Hsien Tseng, Shou-Gwo Wuu | 2013-10-01 |
| 8389316 | Strain bars in stressed layers of MOS devices | Yen-Sen Wang, Min Cao, Sheng-Jier Yang | 2013-03-05 |