Issued Patents All Time
Showing 101–125 of 140 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9755077 | Source and drain stressors with recessed top surfaces | Kun-Mu Li, Tsz-Mei Kwok, Hsueh-Chang Sung, Tze-Liang Lee | 2017-09-05 |
| 9728641 | Semiconductor device and fabrication method thereof | Yen-Ru Lee, Ming-Hua Yu, Tze-Liang Lee, Pang-Yen Tsai, Lilly Su +2 more | 2017-08-08 |
| 9698243 | Transistor strain-inducing scheme | Tsz-Mei Kwok, Hsueh-Chang Sung, Kun-Mu Li, Tze-Liang Lee | 2017-07-04 |
| 9691898 | Germanium profile for channel strain | Hsueh-Chang Sung, Tsz-Mei Kwok, Kun-Mu Li, Tze-Liang Lee | 2017-06-27 |
| 9666686 | MOS devices having epitaxy regions with reduced facets | Hsueh-Chang Sung, Kun-Mu Li, Tze-Liang Lee, Tsz-Mei Kwok | 2017-05-30 |
| 9653574 | Selective etching in the formation of epitaxy regions in MOS devices | Yu-Hung Cheng, Tze-Liang Lee | 2017-05-16 |
| 9601574 | V-shaped epitaxially formed semiconductor layer | Tsz-Mei Kwok, Ming-Hua Yu | 2017-03-21 |
| 9601619 | MOS devices with non-uniform P-type impurity profile | Hsueh-Chang Sung, Tsz-Mei Kwok, Kun-Mu Li, Tze-Liang Lee | 2017-03-21 |
| 9583483 | Source and drain stressors with recessed top surfaces | Kun-Mu Li, Tsz-Mei Kwok, Hsueh-Chang Sung, Tze-Liang Lee | 2017-02-28 |
| 9517539 | Wafer susceptor with improved thermal characteristics | Yi-Hung Lin, Jr-Hung Li, Chang-Shen Lu, Tze-Liang Lee | 2016-12-13 |
| 9484265 | Structure and method for semiconductor device | Yi-Jing Lee, Kun-Mu Li, Tze-Liang Lee | 2016-11-01 |
| 9425287 | Reducing variation by using combination epitaxy growth | Yu-Hung Cheng, Yi-Hung Lin, Tze-Liang Lee | 2016-08-23 |
| 9412868 | Semiconductor device and fabrication method thereof | Yen-Ru Lee, Ming-Hua Yu, Tze-Liang Lee, Pang-Yen Tsai, Lilly Su +2 more | 2016-08-09 |
| 9401426 | Semiconductor device and fabrication method thereof | Lilly Su, Pang-Yen Tsai, Tze-Liang Lee, Yen-Ru Lee, Ming-Hua Yu | 2016-07-26 |
| 9362360 | Modulating germanium percentage in MOS devices | Tsz-Mei Kwok, Kun-Mu Li, Hsueh-Chang Sung, Tze-Liang Lee | 2016-06-07 |
| 9356136 | Engineered source/drain region for n-Type MOSFET | Wei-Yuan Lu, Lilly Su, Chun-Hung Huang, Jyh-Huei Chen | 2016-05-31 |
| 9337337 | MOS device having source and drain regions with embedded germanium-containing diffusion barrier | Tsz-Mei Kwok, Kun-Mu Li, Hsueh-Chang Sung, Tze-Liang Lee | 2016-05-10 |
| 9287382 | Structure and method for semiconductor device | Yi-Jing Lee, Kun-Mu Li, Tze-Liang Lee | 2016-03-15 |
| 9287398 | Transistor strain-inducing scheme | Tsz-Mei Kwok, Hsueh-Chang Sung, Kun-Mu Li, Tze-Liang Lee | 2016-03-15 |
| 9281196 | Method to reduce etch variation using ion implantation | Tsan-Chun Wang, Ziwei Fang, Tze-Liang Lee, Chao-Cheng Chen, Syun-Ming Jang | 2016-03-08 |
| 9269777 | Source/drain structures and methods of forming same | Yi-Jing Lee, Kun-Mu Li, Tze-Liang Lee | 2016-02-23 |
| 9263339 | Selective etching in the formation of epitaxy regions in MOS devices | Yu-Hung Cheng, Tze-Liang Lee | 2016-02-16 |
| 9209175 | MOS devices having epitaxy regions with reduced facets | Hsueh-Chang Sung, Tsz-Mei Kwok, Kun-Mu Li, Tze-Liang Lee | 2015-12-08 |
| 9064688 | Performing enhanced cleaning in the formation of MOS devices | Yu-Hung Cheng, Wu-Ping Huang, Tze-Liang Lee | 2015-06-23 |
| 9054130 | Bottle-neck recess in a semiconductor device | Eric Peng, Chao-Cheng Chen, Ming-Hua Yu, Ying Hao Hsieh, Tze-Liang Lee +2 more | 2015-06-09 |