| 5621813 |
Pattern recognition alignment system |
Robert L. Brown, Hwan J. Jeong, David A. Markle, Richard B. Ward, Mark S. Wanta |
1997-04-15 |
| 5045492 |
Method of making integrated circuit with high current transistor and CMOS transistors |
Wing K. Huie, Alexander H. Owens |
1991-09-03 |
| 4914051 |
Method for making a vertical power DMOS transistor with small signal bipolar transistors |
Wing K. Huie, Alexander H. Owens, Michael J. Zunino |
1990-04-03 |
| 4774202 |
Memory device with interconnected polysilicon layers and method for making |
Kanak C. Sarma, Mark A. Halfacre, Alexander H. Owens, Brian K. Rosier |
1988-09-27 |
| 4706102 |
Memory device with interconnected polysilicon layers and method for making |
Kanak C. Sarma, Mark A. Halfacre, Alexander H. Owens, Brian K. Rosier |
1987-11-10 |
| 4646425 |
Method for making a self-aligned CMOS EPROM wherein the EPROM floating gate and CMOS gates are made from one polysilicon layer |
Alexander H. Owens, Mark A. Halfacre |
1987-03-03 |
| 4598460 |
Method of making a CMOS EPROM with independently selectable thresholds |
Alexander H. Owens, Mark A. Halfacre |
1986-07-08 |
| 4590665 |
Method for double doping sources and drains in an EPROM |
Alexander H. Owens, Mark A. Halfacre, Wing K. Huie |
1986-05-27 |
| 4574467 |
N- well CMOS process on a P substrate with double field guard rings and a PMOS buried channel |
Mark A. Halfacre, Wing K. Huie |
1986-03-11 |
| 4385947 |
Method for fabricating CMOS in P substrate with single guard ring using local oxidation |
Mark A. Halfacre |
1983-05-31 |
