Issued Patents All Time
Showing 1–25 of 25 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12248745 | Generating integrated circuit placements using neural networks | Anna Darling Goldie, Azalia Mirhoseini, Ebrahim Songhori, Wenjie Jiang, Shen Wang +8 more | 2025-03-11 |
| 11853677 | Generating integrated circuit placements using neural networks | Anna Darling Goldie, Azalia Mirhoseini, Ebrahim Songhori, Wenjie Jiang, Shen Wang +8 more | 2023-12-26 |
| 11556690 | Generating integrated circuit placements using neural networks | Anna Darling Goldie, Azalia Mirhoseini, Ebrahim Songhori, Wenjie Jiang, Shen Wang +8 more | 2023-01-17 |
| 11216609 | Generating integrated circuit placements using neural networks | Anna Darling Goldie, Azalia Mirhoseini, Ebrahim Songhori, Wenjie Jiang, Shen Wang +8 more | 2022-01-04 |
| 10875682 | Auxiliary gripping member | Ryan Christopher Jones | 2020-12-29 |
| 10850297 | Wide-body roller paint system | — | 2020-12-01 |
| 10127076 | Low latency thread context caching | Luiz Andre Barroso, Michael Marty | 2018-11-13 |
| 9384036 | Low latency thread context caching | Luiz Andre Barroso, Michael Marty | 2016-07-05 |
| 9367318 | Doubling thread resources in a processor | — | 2016-06-14 |
| 9218310 | Shared input/output (I/O) unit | Luiz Andre Barroso | 2015-12-22 |
| 9207944 | Doubling thread resources in a processor | — | 2015-12-08 |
| 8762951 | Apparatus and method for profiling system events in a fine grain multi-threaded multi-core processor | Nicolai Kosche, Adam R. Talcott, Sanjay Patel, Farnad Sajjadian | 2014-06-24 |
| 8195903 | System and method for metering requests to memory | — | 2012-06-05 |
| 7574566 | System and method for efficient software cache coherence | — | 2009-08-11 |
| 7454631 | Method and apparatus for controlling power consumption in multiprocessor chip | Curtis R. McAllister | 2008-11-18 |
| 7281096 | System and method for block write to memory | Ramaswamy Sivaramakrishnan, Sunil K. Vemula, Sanjay Patel | 2007-10-09 |
| 6182195 | System and method for maintaining coherency of virtual-to-physical memory translations in a multiprocessor computer | Daniel E. Lenoski | 2001-01-30 |
| 6049476 | High memory capacity DIMM with data and state memory | Daniel E. Lenoski, John C. Manton, Michael E. Anderson | 2000-04-11 |
| 5991895 | System and method for multiprocessor partitioning to support high availability | Daniel E. Lenoski | 1999-11-23 |
| 5790447 | High-memory capacity DIMM with data and state memory | Daniel E. Lenoski, John C. Manton | 1998-08-04 |
| 5787476 | System and method for maintaining coherency of virtual-to-physical memory translations in a multiprocessor computer | Daniel E. Lenoski | 1998-07-28 |
| 5727150 | Apparatus and method for page migration in a non-uniform memory access (NUMA) system | Daniel E. Lenoski | 1998-03-10 |
| 5686730 | Dimm pair with data memory and state memory | Daniel E. Lenoski, John C. Manton | 1997-11-11 |
| 5680576 | Directory-based coherence protocol allowing efficient dropping of clean-exclusive data | — | 1997-10-21 |
| 5634110 | Cache coherency using flexible directory bit vectors | Daniel E. Lenoski | 1997-05-27 |