SK

Sergei Koveshnikov

SE Seh-America: 15 patents #3 of 140Top 3%
Micron: 5 patents #2,350 of 6,345Top 40%
IN Intel: 3 patents #10,349 of 30,777Top 35%
📍 Boise, ID: #440 of 3,546 inventorsTop 15%
🗺 Idaho: #617 of 8,810 inventorsTop 8%
Overall (All Time): #182,508 of 4,157,543Top 5%
23
Patents All Time

Issued Patents All Time

Showing 1–23 of 23 patents

Patent #TitleCo-InventorsDate
11309321 Integrated structures containing vertically-stacked memory cells Haitao Liu, Chandra Mouli, Dimitrios Pavlopoulos, Guangyu Huang 2022-04-19
11018149 Building stacked hollow channels for a three dimensional circuit device Zhenyu Lu, Roger Linsday 2021-05-25
10892268 Integrated structures containing vertically-stacked memory cells Haitao Liu, Chandra Mouli, Dimitrios Pavlopoulos, Guangyu Huang 2021-01-12
10381365 Integrated structures containing vertically-stacked memory cells Haitao Liu, Chandra Mouli, Dimitrios Pavlopoulos, Guangyu Huang 2019-08-13
9761599 Integrated structures containing vertically-stacked memory cells Haitao Liu, Chandra Mouli, Dimitrios Pavlopoulos, Guangyu Huang 2017-09-12
7687225 Optical coatings Juan E. Dominguez, Kyle Flanigan, Ernisse Putna 2010-03-30
7507521 Silicon based optically degraded arc for lithographic patterning Kyle Flanigan, Juan E. Dominguez, Ernisse Putna 2009-03-24
6896727 Method of determining nitrogen concentration within a wafer 2005-05-24
6794227 Method of producing an SOI wafer 2004-09-21
6673147 High resistivity silicon wafer having electrically inactive dopant and method of producing same Oleg Kononchuk, Zbigniew J. Radzimski, Neil A. Weaver 2004-01-06
6669775 High resistivity silicon wafer produced by a controlled pull rate czochralski method Oleg Kononchuk, Zbigniew J. Radzimski, Neil A. Weaver 2003-12-30
6669777 Method of producing a high resistivity silicon wafer utilizing heat treatment that occurs during device fabrication Oleg Kononchuk, Zbigniew J. Radzimski, Neil A. Weaver 2003-12-30
6649427 Method for evaluating impurity concentrations in epitaxial susceptors Douglas G. Anderson 2003-11-18
6632688 Method for evaluating impurity concentrations in epitaxial reagent gases 2003-10-14
6630363 Method for evaluating impurity concentrations in unpolished wafers grown by the Czochralski method Douglas G. Anderson 2003-10-07
6620632 Method for evaluating impurity concentrations in semiconductor substrates Craig Rein 2003-09-16
6583024 High resistivity silicon wafer with thick epitaxial layer and method of producing same Oleg Kononchuk, Zbigniew J. Radzimski, Neil A. Weaver 2003-06-24
6576501 Double side polished wafers having external gettering sites, and method of producing same David Beauchaine, Timothy L. Brown, Romony San 2003-06-10
6565652 High resistivity silicon wafer and method of producing same using the magnetic field Czochralski method Oleg Kononchuk, Zbigniew J. Radzimski, Neil A. Weaver 2003-05-20
6423556 Method for evaluating impurity concentrations in heat treatment furnaces Douglas G. Anderson 2002-07-23
6346460 Low cost silicon substrate with impurity gettering and latch up protection and method of manufacture Oleg Kononchuk 2002-02-12
6339011 Method of forming semiconductive active area having a proximity gettering region therein and method of processing a monocrystalline silicon substrate to have a proximity gettering region Fernando Gonzalez 2002-01-15
5943552 Schottky metal detection method Howard Mollenkopf 1999-08-24