JC

Jae-Weon Cho

Samsung: 99 patents #465 of 75,807Top 1%
AM AMD: 8 patents #1,491 of 9,279Top 20%
LC Lg Semicon Co.: 5 patents #48 of 547Top 9%
📍 Seojong-myeon, CA: #1 of 125 inventorsTop 1%
Overall (All Time): #11,313 of 4,157,543Top 1%
113
Patents All Time

Issued Patents All Time

Showing 101–113 of 113 patents

Patent #TitleCo-InventorsDate
7515562 Apparatus and method for supporting soft handover in broadband wireless access communication system Chi-Woo Lim, Pan-Yuh Joo, Sie-Joon Cho, Young-Bin Chang 2009-04-07
7450909 Apparatus and method for signal transmission and reception using downlink channel information in a sleep mode in a BWA communication system Jung-Je Son, Chang-Hoi Koo, Pan-Yuh Joo, Yeong-Moon Son, Young-Bin Chang +4 more 2008-11-11
7235412 Semiconductor component having test pads and method and apparatus for testing same Mohsen H. Mardi, Xin Wu, Chih-Chung Wu, Shih-Liang Liang, Sanjiv Stokes +1 more 2007-06-26
6891395 Application-specific testing methods for programmable logic devices Robert W. Wells, Zhi-Min Ling, Robert D. Patrie, Vincent L. Tong, Shahin Toutounchi 2005-05-10
6817006 Application-specific testing methods for programmable logic devices Robert W. Wells, Zhi-Min Ling, Robert D. Patrie, Vincent L. Tong, Shahin Toutounchi 2004-11-09
6664808 Method of using partially defective programmable logic devices Zhi-Min Ling, Robert W. Wells, Clay S. Johnson, Shelly Davis 2003-12-16
6594797 Methods and circuits for precise edge placement of test signals Rick W. Dudley, Robert D. Patrie, Robert W. Wells 2003-07-15
6376131 Methods and structures for protecting reticles from ESD failure Zhi-Min Ling, Xin Wu 2002-04-23
6087718 Stacking type semiconductor chip package 2000-07-11
5958270 Wire bonding wedge tool with electric heater 1999-09-28
5933711 Fabrication method for chip size semiconductor package 1999-08-03
5863816 Fabrication method for chip size semiconductor package 1999-01-26
5834830 LOC (lead on chip) package and fabricating method thereof 1998-11-10