Issued Patents All Time
Showing 51–75 of 152 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7492188 | Interconnection and input/output resources for programmable logic integrated circuit devices | Tony Ngai, Bruce B. Pedersen, Sergey Shumarayev, James Schleicher, Wei-Jen Huang +6 more | 2009-02-17 |
| 7474167 | Capacitance switch circuitry for digitally controlled oscillators | Jingcheng Zhuang, Tad Kwasniewski, Qingjin Du | 2009-01-06 |
| 7436210 | Next generation 8B10B architecture | Ramanand Venkata, Chong H. Lee | 2008-10-14 |
| 7362833 | Dynamic special character selection for use in byte alignment circuitry | Vinson Chan, Chong H. Lee, Ramanand Venkata | 2008-04-22 |
| 7355449 | High-speed serial data transmitter architecture | Thungoc M. Tran, Sergey Shumarayev, Kazi Asaduzzaman, Wilson Wong, Mei Luo | 2008-04-08 |
| 7355462 | Phase lock loop and method for operating the same | Wilson Wong, Sergey Shumarayev | 2008-04-08 |
| 7343569 | Apparatus and method for reset distribution | John Lam, Arch Zaliznyak, Chong H. Lee, Vinson Chan | 2008-03-11 |
| 7333570 | Clock data recovery circuitry associated with programmable logic device circuitry | Edward Aung, Henry Y. Lui, Paul Butler, John E. Turner, Chong H. Lee | 2008-02-19 |
| 7317332 | Interconnection and input/output resources for programmable logic integrated circuit devices | Tony Ngai, Bruce B. Pedersen, Sergey Shumarayev, James Schleicher, Wei-Jen Huang +1 more | 2008-01-08 |
| 7307446 | Integrated circuit output driver circuitry with programmable preemphasis | Sergey Shumarayev, Thomas H. White, Wilson Wong | 2007-12-11 |
| 7304494 | Methods and apparatus to DC couple LVDS driver to CML levels | Wilson Wong, Tim Tri Hoang, Sergey Shumarayev, Simardeep Maangat | 2007-12-04 |
| 7304498 | Clock circuitry for programmable logic devices | William W. Bereza, Shoujun Wang | 2007-12-04 |
| 7292065 | Enhanced passgate structures for reducing leakage current | Henry Y. Lui, Malik Kabani, Tim Tri Hoang | 2007-11-06 |
| 7272677 | Multi-channel synchronization for programmable logic device serial interface | Ramanand Venkata, Chong H. Lee | 2007-09-18 |
| 7262635 | Interconnection resources for programmable logic integrated circuit devices | James Schleicher, Jim Park, Sergey Shumarayev, Bruce B. Pedersen, Tony Ngai +2 more | 2007-08-28 |
| 7227918 | Clock data recovery circuitry associated with programmable logic device circuitry | Edward Aung, Henry Y. Lui, Paul Butler, John E. Turner, Chong H. Lee | 2007-06-05 |
| 7183797 | Next generation 8B10B architecture | Ramanand Venkata, Chong H. Lee | 2007-02-27 |
| 7151470 | Data converter with multiple conversions for padded-protocol interface | Ning Xue, Ramanand Venkata, Chong H. Lee | 2006-12-19 |
| 7151397 | Voltage controlled oscillator programmable delay cells | Stjepan Andrasic, Chong H. Lee | 2006-12-19 |
| 7135887 | Programmable logic device multispeed I/O circuitry | Sergey Shumarayev | 2006-11-14 |
| 7132847 | Programmable slew rate control for differential output | Wilson Wong, Sergey Shumarayev | 2006-11-07 |
| 7131024 | Multiple transmit data rates in programmable logic device serial interface | Ramanand Venkata, Chong H. Lee | 2006-10-31 |
| 7123052 | Interconnection resources for programmable logic integrated circuit devices | James Schleicher, Jim Park, Sergey Shumarayev, Bruce Pederson, Tony Ngai +2 more | 2006-10-17 |
| 7109743 | Integrated circuit output driver circuitry with programmable preemphasis | Sergey Shumarayev, Thomas H. White, Wilson Wong | 2006-09-19 |
| 7071726 | Selectable dynamic reconfiguration of programmable embedded IP | Vinson Chan, Chong H. Lee, Ramanand Venkata, Binh Ton | 2006-07-04 |