Issued Patents All Time
Showing 101–118 of 118 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6834378 | System on a chip bus with automatic pipeline stage insertion for timing closure | Victor Roberts Augsburg, Bernard C. Drerup, Richard Gerard Hofmann, Thomas Andrew Sartorius, Barry Joe Wolford | 2004-12-21 |
| 6826656 | Reducing power in a snooping cache based multiprocessor environment | Victor Roberts Augsburg, Bernard C. Drerup, Richard Gerard Hofmann, Thomas Andrew Sartorius, Barry Joe Wolford | 2004-11-30 |
| 6826747 | System and method for tracing program instructions before and after a trace triggering event within a processor | Victor Roberts Augsburg, Jeffrey Todd Bridges, Thomas Kevin Collopy, Thomas Andrew Sartorius | 2004-11-30 |
| 6807608 | Multiprocessor environment supporting variable-sized coherency transactions | Victor Roberts Augsburg, Bernard C. Drerup, Richard Gerard Hofmann, Thomas Andrew Sartorius, Barry Joe Wolford | 2004-10-19 |
| 6330296 | Delay-locked loop which includes a monitor to allow for proper alignment of signals | Francois Ibrahim Atallah, George F. Diniz, David John Seman | 2001-12-11 |
| 6192486 | Memory defect steering circuit | Anthony Correale, Jr., William Lee, Trevor Garner | 2001-02-20 |
| 6001662 | Method and system for providing a reusable configurable self-test controller for manufactured integrated circuits | Anthony Correale, Jr., Trevor Garner, Ronald William Kohake, Ketan Vitthal Patel | 1999-12-14 |
| 5996092 | System and method for tracing program execution within a processor before and after a triggering event | Victor Roberts Augsburg, Jeffrey Todd Bridges, Thomas Kevin Collopy, Thomas Andrew Sartorius | 1999-11-30 |
| 5926831 | Methods and apparatus for control of speculative memory accesses | Juan Guillermo Revilla, Thomas Andrew Sartorius, Mark Michael Schaffer | 1999-07-20 |
| 5910930 | Dynamic control of power management circuitry | George F. Diniz, Thomas Andrew Sartorius | 1999-06-08 |
| 5884051 | System, methods and computer program products for flexibly controlling bus access based on fixed and dynamic priorities | Mark Michael Schaffer, Edward Hammond Green, III, Juan Guillermo Revilla | 1999-03-16 |
| 5809293 | System and method for program execution tracing within an integrated processor | Jeffrey Todd Bridges, Thomas Kevin Collopy, Thomas Joseph Irene, Harry I. Linzer, Thomas Andrew Sartorius | 1998-09-15 |
| 5734600 | Polynomial multiplier apparatus and method | James Warren Dieffenderfer | 1998-03-31 |
| 5724572 | Method and apparatus for processing null terminated character strings | Harry I. Linzer, Thomas Andrew Sartorius | 1998-03-03 |
| 5708852 | Apparatus for serial port with pattern generation using state machine for controlling the removing of start and stop bits from serial bit data stream | Donna Wiltsey Aebli | 1998-01-13 |
| 5590372 | VME bus transferring system broadcasting modifiers to multiple devices and the multiple devices simultaneously receiving data synchronously to the modifiers without acknowledging the modifiers | Bruce Morehead | 1996-12-31 |
| 5333301 | Data transfer bus system and method serving multiple parallel asynchronous units | Dennis P. Cheney, Ronald A. Oreshan, Robert J. Yagley | 1994-07-26 |
| 5224213 | Ping-pong data buffer for transferring data from one data bus to another data bus | Ronald Nick Kalla | 1993-06-29 |