Issued Patents All Time
Showing 1–24 of 24 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9152595 | Processor-based system hybrid ring bus interconnects, and related devices, processor-based systems, and methods | Jaya Prakash Subramaniam Ganasan, Prudhvi N. Nooney, Perry Willmann Remaklus, Jr. | 2015-10-06 |
| 9064050 | Arbitrating bus transactions on a communications bus based on bus device health information and related power management | Cristian Duroiu, Jaya Prakash Subramaniam Ganasan, Vinod Chamarty, Joshua H. Stubbs, Robert N. Gibson +5 more | 2015-06-23 |
| 8861410 | Method and apparatus for scalable network transaction identifier for interconnects | Jaya Prakash Subramaniam Ganasan, Prudhvi N. Nooney, Darren Paul Umstead, Joseph L. Van Swearingen, Barry Joe Wolford | 2014-10-14 |
| 8838861 | Methods and apparatuses for trace multicast across a bus structure, and related systems | Martyn Ryan Shirlen | 2014-09-16 |
| 8615638 | Memory controllers, systems and methods for applying page management policies based on stream transaction information | Martyn Ryan Shirlen, Richard Gerard Hofmann | 2013-12-24 |
| 8599886 | Methods and apparatus for reducing transfer qualifier signaling on a two-channel bus | Martyn Ryan Shirlen, Richard Gerard Hofmann | 2013-12-03 |
| 8028143 | Method and apparatus for transmitting memory pre-fetch commands on a bus | Richard Gerard Hofmann | 2011-09-27 |
| 7913021 | Scalable bus structure | Richard Gerard Hofmann | 2011-03-22 |
| 7617343 | Scalable bus structure | Richard Gerard Hofmann | 2009-11-10 |
| 7395361 | Apparatus and methods for weighted bus arbitration among a plurality of master devices based on transfer direction and/or consumed bandwidth | Richard Gerard Hofmann, Jaya Prakash Subramaniam Ganasan | 2008-07-01 |
| 7209998 | Scalable bus structure | Richard Gerard Hofmann | 2007-04-24 |
| 7185123 | Method and apparatus for allocating bandwidth on a transmit channel of a bus | Richard Gerard Hofmann | 2007-02-27 |
| 6504854 | Multiple frequency communications | Richard Gerard Hofmann, Thomas Andrew Sartorius | 2003-01-07 |
| 6081860 | Address pipelining for data transfers | Jeffrey Todd Bridges, Juan Guillermo Revilla, Thomas Andrew Sartorius | 2000-06-27 |
| 6055584 | Processor local bus posted DMA FlyBy burst transfers | Jeffrey Todd Bridges, Edward Hammond Green, III, Richard Gerard Hofmann, David Otero, Dennis Charles Wilkerson | 2000-04-25 |
| 6052745 | System for asserting burst termination signal and burst complete signal one cycle prior to and during last cycle in fixed length burst transfers | Michael Raymond Miller, John McCardle, Michael Patrick Muhlada, Christopher Randall Starr | 2000-04-18 |
| 6047336 | Speculative direct memory access transfer between slave devices and memory | Edward Hammond Green, III, Richard Gerard Hofmann, Dennis Charles Wilkerson | 2000-04-04 |
| 6032238 | Overlapped DMA line transfers | Edward Hammond Green, III, Richard Gerard Hofmann, Dennis Charles Wilkerson | 2000-02-29 |
| 5925118 | Methods and architectures for overlapped read and write operations | Juan Guillermo Revilla, Thomas Andrew Sartorius | 1999-07-20 |
| 5926831 | Methods and apparatus for control of speculative memory accesses | Juan Guillermo Revilla, Thomas Andrew Sartorius, James Norris Dieffenderfer | 1999-07-20 |
| 5884051 | System, methods and computer program products for flexibly controlling bus access based on fixed and dynamic priorities | James Norris Dieffenderfer, Edward Hammond Green, III, Juan Guillermo Revilla | 1999-03-16 |
| 5862353 | Systems and methods for dynamically controlling a bus | Juan Guillermo Revilla, Thomas Andrew Sartorius | 1999-01-19 |
| 5848436 | Method and apparatus for efficiently providing data from a data storage medium to a processing entity | Thomas Andrew Sartorius | 1998-12-08 |
| 4926374 | Residue checking apparatus for detecting errors in add, subtract, multiply, divide and square root operations | — | 1990-05-15 |