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Home › Semiconductor device having stressed etch stop layers of different intrinsic stress in combination with PN junctions of different design in different device regions

Semiconductor device having stressed etch stop layers of different intrinsic stress in combination with PN junctions of different design in different device regions

US Patent 7732291 · Granted Jun 8, 2010

Estimated economic value: $16,231,000 ⓘ

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