Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Transistors having buried p-type layers coupled to the gate

Transistors having buried p-type layers coupled to the gate

US Patent 7646043 · Granted Jan 12, 2010

Estimated economic value: $10,777,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Group III-nitride high-electron mobility transistors with gate connected buried 2025
Group III-nitride high-electron mobility transistors with buried p-type layers a2025
Circuits and group III-nitride transistors with buried p-layers and controlled g2025
Field effect transistor with selective channel layer doping2025
Group III-nitride high-electron mobility transistors with a buried metallic cond2025
Gallium Nitride high-electron mobility transistors with p-type layers and proces2024
Bottle2024
Semiconductor devices having unit cell transistors with smoothed turn-on behavio2024
Bottle2024
Circuits and group III-nitride high-electron mobility transistors with buried p-2024
Group III-nitride high-electron mobility transistors with buried p-type layers a2024
Field effect transistor with enhanced reliability2023